Cache and Squeak Performance

Patrick Logan patrickl at servio.gemstone.com
Fri Feb 13 20:44:00 UTC 1998


    The PowerPC 750 processor supports up to 1MB of L2 cache (but it
    is 2-way set-associative!).  The more important fact is that the
    L1 cache size is 32K Instruction + 32K data, 8-way
    set-associative, which goes a long way towards caching the
    (non-jitter) VM working set.

To go along with STP's explanation of "backside" cache, maybe Tim or
someone could post or drop me a note explaning what N-way set
associative is, benefit-wise.

Thanks

-- 
Patrick Logan                 mailto:patrickl at gemstone.com
Voice 503-533-3365            Fax   503-629-8556
Gemstone Systems, Inc         http://www.gemstone.com





More information about the Squeak-dev mailing list