CPU running smalltalk bytecode

Roger Vossler rvossler at qwest.net
Sat Feb 9 01:12:57 UTC 2002


Hi Tim,

I agree. Dave Parnas (yes, THE David Parnas) once pointed out 
(forcefully)
to me that if it's digital, it does sequencing. If it does sequencing, 
it's a Finite
State Machine. If it's a FSM, it uses stacks. If stacks are used 
correctly, it ain't
gonna get much faster than that.

I once had a 6.67Mhz Lilith built out of bit-sliced technology executing 
bytecodes
with a 12-element expression stack that ran circles around a 30MHz Moto 
68030.
The Lilith was programmed entirely in Modula-2.

Cheers, Roger.....

On Friday, February 8, 2002, at 09:47 AM, Tim Rowledge wrote:

> Hannes Hirzel <hirzel at spw.unizh.ch> is claimed by the authorities to 
> have written:
>
>>> Also, I have heard Lex talking about a CPU able to run Smalltalk 
>>> platform.
>>> Is it possible to have more information about it ? Perhaps next 
>>> generation of CPU (Motorola, Intel, AMD, ...) could include such 
>>> features...

[snip]

> My feeling is that a really simple RISC cpu is likely to be most useful,
> long with a really fast memory system. I've pointed out many times that
> there are three important metrics fora fast Smalltalk system - memory
> bandwidth, memory bandwidth and memory bandwidth. Give me a 600MHz ARM
> 10 and 600 MHz 128bit wide MRAM and watch the bits fly :-) A simple RISC
> isa is going to be easier to write and maintain a translator for and
> thus it will probably get to work better.

[snip]

> There is at least one paper i the GreenBook (Bits of Histoy, Words of
> Advice) which details an attempt at this. One of the problems was that
> the chip never really worked up to par.
>
> tim
> --
> Tim Rowledge, tim at sumeru.stanford.edu, http://sumeru.stanford.edu/tim
> The computer is mightier than the pen, the sword, and usually, the 
> programmer




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