[OT] MRAM, spintronics, the future

Andrew Berg andrew_c_berg at yahoo.com
Wed Feb 12 00:17:58 UTC 2003

On Tue, 11 Feb 2003 12:49:16 -0800, Tim Rowledge <tim at sumeru.stanford.edu> 

> Göran Hultgren <goran.hultgren at bluefish.se> appears to have written:
>> Nope, that is the beauty. These babies don't require voltage to 
>> "remember".
>> And access times are around 1 ns (read in the swedish article) so MRAM 
>> can
>> replace both primary, secondary *and* cache memory for CPUs.
> Exactly; once available they should make it possible to have 1-2GHz cpus
> which need no caches (simplifying things enormously and making them even
> cheaper) and can run at full speed pretty much all the time. I guess
> one might even think of abandoning large register files, since the main
> memory would be as fast. Context switching would be hugely faster (even
> ARMs take a hundred or more cycles to respond to interrupts and Sparcs
> take a couple of weeks) which might enable all sorts of interesting
> programming tricks.

mmmm, rrrr, well things are not quite so easy.  you've still got bandwidth 
and latency issues in going to main memory, so there will still be a very 
real need for register files and cache on the cpu.  especially if you 
imagine a cpu running at some reasonably hight clock rate, say 10 Ghz, the 
latency of signal propigation from the cpu, through 2 or 3 inches of copper 
and into the memory module is going to be in the neighborhood of 100 clock 
cycles.  1 ns (10 clocks) to do the read, and another 100 clocks to get the 
signal back.  remember, signals only propigate at somewhere around c/3.  
better to cache what you can.  getting good clock signals everywhere on the 
same chip at once is pretty hard, and as the process gets smaller and the 
chips get bigger it just keeps getting worse.

> Now if only they can work out how to include a cpu on the same chip as
> a gig or so of MRAM we can getto some interesting machines...

mmmm, rrrr, might be okay for an embedded processor, but you'll limit your 
cpu's performance dramatically by doing that.  the fab process for making a 
cpu is very different from that for, say dram, and will likely be even more 
very different for mram.  thinking /= remembering.  now, if i were to dream 
of something, it would be for someone to build a cpu with 2^10 ARM 
processors on it, a huge L2 cache and a big fat pipe to the outside world.

> tim


andrew_c_berg at yahoo.com

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