So Yoshiki, you think that "we" can find some VM workaround for the cache
problem?... (that's interesting...)
.. Or maybe the SLC700 got the new chips...

I'll try working with the VM... (based on your ARM version -that's the only
working version i got)


Thank you all!..
-Pablo

-----Mensaje original-----
De: Yoshiki.Ohshima at acm.org [mailto:Yoshiki.Ohshima at acm.org] 
Enviado el: Lunes, 19 de Mayo de 2003 01:11 p.m.
Para: The general-purpose Squeak developers list
Asunto: Re: XScaled Squeak


  Hello,

> Basically, under WinCE the factory supplied bootloader does not turn 
> on the write back cache, so WinCE won't see the improved cache 
> behavior, even if the updated processor chip happens to be present.  
> Or at least this is my understanding of the situation.

  I believe this part is true, too.

> It is probably possible to turn it on from a user program (given 
> WinCE's lack of security), but as I remember, the fancy footwork to 
> change processor parameters like this is often pretty daunting, so I'd 
> not be optimistic of anyone succeeding easily; it is likely alot more 
> than just poking a bit into a processor register.  You can get the 
> XScale processor spec and see if it is enlightening on this topic and 
> easier than I currently suspect (having not looked into it myself.

  I don't think you can turn it on from a user program...  (What do you mean
by "WinCE's lack of security"?  It is at least memory protected, separated
supervisor/user mode OS.  The reference manual of XScale lists the sample
code to change the cache behaviors and memory region attribute flags or
such, but as far as I understand (with a little experiment), The instruction
cannot be executed from a user-level program.

  Of course, my attempt might have been too easy...

> This isn't true for Linux on the iPAQ, but as Linux on the iPAQ 54xx 
> is still a "work in progress", it returns you to the previously 
> unsolved problem.  We do have H39xx's running pretty completely under 
> Linux (the first models with the XScale processor), however, and if 
> you have a unit with the fixed cache, we take advantage of it. We hope 
> H54xx's will be done in another month or two: the kernel boots fine, 
> and we're working on the device drivers.

  Oh, do you mean that there are some (stepping of) chips with the fixed
cache and named PXA250??

  As for the Squeak performance, there is another twist in this story. The
VM on SL-C700 (a PXA 250 device) feels much faster than other PXA 250 based
WinCEs (Aaron has reported similar with his machines...) There might be some
performance glitch in the VM support code.  The toolchain that Sharp provide
is based on 2.95.2 and I don't think it does XScale specific optimization.
If we change the compiler, it may get some boost.

  The coming PXA255 based SL-C750/C760 may perform somewhat better than
C700.  This machine is really interesting to see.  (Actually, you can try it
at a Sharp showroom in Tokyo today...)

  Also, using GCC for builidng WinCE VM, if it is possible, might help.

-- Yoshiki