[squeak-dev] Re: floats
Iain Bason
iain at thebasons.com
Thu Mar 19 13:28:32 UTC 2009
On Mar 17, 2009, at 11:47 PM, Eliot Miranda wrote:
> Part of my complaint is the name, Scaleable Processor ARCitecture.
> The current SPARC requires 6 (reads it and weep, _6_) 32-bit
> instructions to synthesize an arbitrary 64-bit literal. It hasn't
> scaled to 64-bits; consequently there are a range of addressing
> models in 64-bit SPARC compilers, 20-something-bits 40-something
> bits (I forget the details) and 64-bits. By contrast there are 10-
> byte instructions that do 64-bit literals loads in x86-64. So a
> 200% overhead vs a 25% overhead.
>
It doesn't seem to matter, though, for C/C++/Fortran programs. In
those benchmarks where SPARC is slower in 64-bit mode than 32-bit
mode, the slowdown is due to the benchmark's data structures being
larger because of 64-bit pointers. Loading a 64 bit literal is ugly,
but so what?
Is there some reason why Smalltalk would need to do more loads of 64
bit literals than C/C++/Fortran?
Iain
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