<br><br><div class="gmail_quote">On Fri, Oct 31, 2008 at 4:21 AM, Gerardo Richarte <span dir="ltr"><<a href="mailto:gera@corest.com">gera@corest.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">
<div class="Ih2E3d">Eliot Miranda wrote:<br>
> I wonder if anyone has any 32-bit processor implementations,<br>
> either in Smalltalk or in some other, preferrably easy-to-parse,<br>
> formal semantics.<br>
</div> I thought about this several times, but never came down to implement<br>
it: The Intel manuals do have a very concrete pseudocode for every<br>
instruction, and it does look quite parsable. I did start once, but the<br>
need for it disappeared, and I never finished...<br>
<br>
the description for ADD is:<br>
<br>
DEST $B"+(B DEST + SRC + CF;<br>
<br>
and for AAA (Ascii adjust after addition) is more complex:<br>
IF 64-Bit Mode<br>
THEN<br>
#UD;<br>
ELSE<br>
IF ((AL AND 0FH) > 9) or (AF = 1)<br>
THEN<br>
AL $B"+(B AL + 6;<br>
AH $B"+(B AH + 1;<br>
AF $B"+(B 1;<br>
CF $B"+(B 1;<br>
AL $B"+(B AL AND 0FH;<br>
ELSE<br>
AF $B"+(B 0;<br>
CF $B"+(B 0;<br>
AL $B"+(B AL AND 0FH;<br>
FI;<br>
FI;<br>
<br>
I think it really is an option to write a compiler from PDF to<br>
Smalltalk :)<br>
<br>
richie</blockquote><div><br></div><div>Superficially this looks good. But it is only a part of the semantics. This is a fairly abstract semantics. It leaves out definitions of registers (e.g. DEST $B"+(B DEST + SRC + CF;) and all the instruction decode, which on x86 is complex and easy to screw up.</div>
</div><br>