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<div>Eliot - I know you've already moved past this problem, but in the future, gcc -S foo.c will create foo.s with the assembly generated by gcc.</div><div><br></div><div>David</div><br><div><div>On Jan 21, 2009, at 2:08 PM, Eliot Miranda wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">Hi Martin, can you send me the assembly? Or show me the opcodes? When I try this it doesn't work. So I must be doing something differently.<div><br>and Hi! Robert Hirschfeld mentioned you when he and I met last week.</div> <div><br><div class="gmail_quote">On Wed, Jan 21, 2009 at 11:06 AM, Martin Beck <span dir="ltr"><<a href="mailto:martin.beck@hpi.uni-potsdam.de">martin.beck@hpi.uni-potsdam.de</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;"> Hi Eliot,<br> <div class="Ih2E3d"><br> Eliot Miranda wrote:<br> > Hi All,<br> > anyone know the x86/IA32 really well? If so, read on. Otherwise save<br> > yourself the yawn.<br> ><br> </div>[...]<br> <div class="Ih2E3d">> (my emphasis added). But neither the Bochs simulator nor my Intel Core Duo<br> > set the flags when doing sarl $1, %eax when %eax contains -1. Have I<br> > misread, or is the manual wrong?<br> ><br> </div>I cannot confirm this. Using this simple C-Program:<br> <br> int calc(int i) {<br> return i >> 1;<br> }<br> <br> int main() {<br> printf("%i\n", calc(-1));<br> }<br> <br> my GCC 4.3.2 generates a sarl %eax instruction as the assembler output<br> shows. Debugging it with Kdbg shows a change of the flags after the<br> instruction. In fact, CF and SF are set as (more or less) expected. I<br> also have a Intel Core 2 Duo.<br> <br> Regards,<br> <font color="#888888">Martin<br> <br> </font></blockquote></div><br></div><div style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px; min-height: 14px; "><br></div> </blockquote></div><br></body></html>