<html><head><meta http-equiv="content-type" content="text/html; charset=utf-8"></head><body dir="auto"><div dir="ltr"><br></div><div dir="ltr"><br><blockquote type="cite">On Feb 22, 2020, at 4:48 PM, tim Rowledge <tim@rowledge.org> wrote:<br><br></blockquote></div><blockquote type="cite"><div dir="ltr"><br class="">Well, that's interesting. The bug is different on a Raspberry Pi (I was hoping non-existent) because the bitblt code is quite different as a result of the Pi Foundation paying to get much faster ARM assembler blt code written.<div class=""><div><Screen Shot 2020-02-22 at 4.46.32 PM.png></div></div><div class="">Same sort of pattern but not identical. Sigh. This will be 'fun' to investigate.</div></div></blockquote><div><br></div>It would be great if the ARM fast bit of work could be refactored to affect inner loops and hence avoid duplicating the set up code.<div><br></div><div>I *think* the bug Nicolas fixed is a regression caused by me fixing a different bug, the code reading an extra word off the end of the bitmap in some circumstances (which caused a seg fault if the bitmap was at the end of a memory mapping). It’s quite likely that that bug is in the ARM fast blt code if it does its own set up.</div><div><br><blockquote type="cite"><div dir="ltr"><div class=""><br class=""><div class=""><br class="">tim<br class="">--<br class="">tim Rowledge; <a href="mailto:tim@rowledge.org" class="">tim@rowledge.org</a>; <a href="http://www.rowledge.org/tim" class="">http://www.rowledge.org/tim</a><br class="">Strange OpCodes: NBR: Unconditional No BRanch<br class=""><br class=""></div><br class=""></div><span></span><br></div></blockquote></div></body></html>