[Vm-dev] [GSoC] ARM JIT

[Henrik Sperre Johansen]

On 25.07.2012 00:16, Lars wrote:
>
>
> I also looked over the conditional Jumping codes and added them. But 
> there seems to be some ambiguity on ARM. Especially about 'unordered' 
> and 'less than'. The 'less than' condition also is also true in case 
> the VFP generated an unordered. For the non-fp codes, I found a list 
> what they mean for the processor flags on x86, thus being able to map 
> them onto the 15 ARM conditional codes. Does anybody have (a link to) 
> a list of the flag-interpretation for FP-state (as used in IA32 and 
> probably in cog)?
>
> Thank you,
> Lars

http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html/
The relevant info is in Volume 1, Figure 8-4 describes the FP state 
registers layout, and Table 8-1 how different floating point operations 
effect the condition codes.

(Per the instruction reference in Volume 2, in the FCOM category, C3 is 
set if equal, C0 if less than. Both are set if unordered).

Also, note FCOMI & friends set EFLAGS directly, not quite sure which set 
of ops Cog is using.

Cheers,
Henry