[Vm-dev] VM Maker: VMMaker.oscog-cb.1188.mcz

[commits at source.squeak.org]

ClementBera uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1188.mcz

==================== Summary ====================

Name: VMMaker.oscog-cb.1188
Author: cb
Time: 13 April 2015, 3:31:45.334 pm
UUID: cd69e2b4-f2bc-45f3-8183-3dfd01738742
Ancestors: VMMaker.oscog-eem.1187

fix a bug where sometimes register allocation was marking ReceiverResultReg as dead whereas it was still alive.

=============== Diff against VMMaker.oscog-eem.1187 ===============

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>allocateOneRegister (in category 'simulation stack') -----
  allocateOneRegister
  
- 	| rTop |
- 
  	self ssTop type = SSRegister ifTrue: [ ^ self ssTop register].
  	
+ 	^ self allocateRegisterNotConflictingWith: 0
- 	rTop := self allocateRegisterNotConflictingWith: 0.
- 	
- 	rTop = ReceiverResultReg ifTrue: 
- 		[ optStatus isReceiverResultRegLive: false ].
- 	
- 	^ rTop
- 	
  	!

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>allocateRegisterNotConflictingWith: (in category 'simulation stack') -----
  allocateRegisterNotConflictingWith: registerMask
  	| reg |
  	"if there's a free register, use it"
  	reg := backEnd availableRegisterOrNilFor: (self liveRegisters bitOr: registerMask).
+ 	reg ifNil: "No free register, choose one that does not conflict with registerMask"
+ 		[reg := self freeRegisterNotConflictingWith: registerMask].
+ 	reg = ReceiverResultReg ifTrue: "If we've allocated RcvrResultReg, it's not live anymore"
+ 		[ optStatus isReceiverResultRegLive: false ].
+ 	^ reg!
- 	reg ifNotNil: [^ reg].
- 	"No free register, choose one that does not conflict with registerMask"
- 	^ self freeRegisterNotConflictingWith: registerMask!

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>allocateThreeRegistersInto:thirdIsReceiver: (in category 'simulation stack') -----
  allocateThreeRegistersInto: trinaryBlock thirdIsReceiver: thirdIsReceiver
+ 	| topRegistersMask rTop rNext rThird |
- 	| topRegistersMask rTop rNext rThird needsThirdRegUpdate |
  	
  	topRegistersMask := 0.
- 	needsThirdRegUpdate := true.
  	
  	(self ssTop type = SSRegister and: [ thirdIsReceiver not or: [ self ssTop register ~= ReceiverResultReg ] ]) ifTrue: 
  		[ topRegistersMask := self registerMaskFor: (rTop := self ssTop register)].
  	((self ssValue: 1) type = SSRegister and: [ thirdIsReceiver not or: [ (self ssValue: 1) register ~= ReceiverResultReg ] ]) ifTrue: 
  		[ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rNext := (self ssValue: 1) register))].
  	((self ssValue: 2) type = SSRegister and: [thirdIsReceiver not or: [ (self ssValue: 2) register = ReceiverResultReg ] ]) ifTrue: 
+ 		[ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rThird := (self ssValue: 2) register))].
- 		[ needsThirdRegUpdate := false.
- 		 topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rThird := (self ssValue: 2) register))].
  	
  	rThird ifNil: 
  		[ thirdIsReceiver 
+ 			ifTrue:
+ 				[ rThird := ReceiverResultReg.  "Free ReceiverResultReg if it was not free"
- 			ifTrue: "Is ReceiverResultReg free ?"
- 				[ rThird := ReceiverResultReg. 
  				(self register: ReceiverResultReg isInMask: self liveRegisters) ifTrue: 
+ 					[ self ssAllocateRequiredReg: ReceiverResultReg ].
+ 				optStatus isReceiverResultRegLive: false ]
- 					[ self ssAllocateRequiredReg: ReceiverResultReg ] ]
  			ifFalse: [ rThird := self allocateRegisterNotConflictingWith: topRegistersMask ].
  		topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: rThird) ].
  	
  	rTop ifNil: [ 
  		rTop := self allocateRegisterNotConflictingWith: topRegistersMask.
  		topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: rTop) ].
  	
  	rNext ifNil: [ rNext := self allocateRegisterNotConflictingWith: topRegistersMask ].
  	
- 	(rTop = ReceiverResultReg or: [rNext = ReceiverResultReg or: [rThird = ReceiverResultReg and: [ needsThirdRegUpdate ]]]) ifTrue: 
- 		[ optStatus isReceiverResultRegLive: false ].
- 	
  	^ trinaryBlock value: rTop value: rNext value: rThird
  	
  	!

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>allocateTwoRegistersInto: (in category 'simulation stack') -----
  allocateTwoRegistersInto: binaryBlock
  	| topRegistersMask rTop rNext |
  	
  	topRegistersMask := 0.
  	
  	self ssTop type = SSRegister ifTrue: 
  		[ topRegistersMask := self registerMaskFor: (rTop := self ssTop register)].
  	(self ssValue: 1) type = SSRegister ifTrue: 
  		[ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rNext := (self ssValue: 1) register))].
  	
  	rTop ifNil: [ rTop := self allocateRegisterNotConflictingWith: topRegistersMask ].
  	
  	rNext ifNil: [ rNext := self allocateRegisterNotConflictingWith: (self registerMaskFor: rTop) ].
  	
- 	(rTop = ReceiverResultReg or: [rNext = ReceiverResultReg]) ifTrue: 
- 		[ optStatus isReceiverResultRegLive: false ].
- 	
  	^ binaryBlock value: rTop value: rNext
  	
  	!