[Vm-dev] VM Maker: VMMaker.oscog-eem.1204.mcz
commits at source.squeak.org
commits at source.squeak.org
Thu Apr 16 22:25:42 UTC 2015
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1204.mcz
==================== Summary ====================
Name: VMMaker.oscog-eem.1204
Author: eem
Time: 16 April 2015, 3:23:07.977 pm
UUID: 45d34c98-fee8-4874-95b4-842de9ba8cbc
Ancestors: VMMaker.oscog-cb.1203
ifTrue:ype of AbstractInstruction opcode must be
unsigned now that we have > 128 opcodes
(XCHGRR pushed things over the top).
Fix some Slang generation-time warnings.
=============== Diff against VMMaker.oscog-cb.1203 ===============
Item was changed:
----- Method: CogAbstractInstruction class>>instVarNamesAndTypesForTranslationDo: (in category 'translation') -----
instVarNamesAndTypesForTranslationDo: aBinaryBlock
"enumerate aBinaryBlock with the names and C type strings for the inst vars to include in an AbstractInstruction struct."
"{CogAbstractInstruction. CogIA32Compiler. CogARMCompiler} do:
[:c| Transcript print: c; cr. c printTypedefOn: Transcript]"
| machineCodeBytes |
machineCodeBytes := self == CogAbstractInstruction
ifTrue: [0]
ifFalse: [self basicNew machineCodeBytes].
(self filteredInstVarNames copyWithout: 'machineCode'), #('machineCode') do:
[:ivn|
ivn ~= 'bcpc' ifTrue:
[aBinaryBlock
value: ivn
value: (ivn caseOf: {
+ ['address'] -> [#'unsigned long'].
+ ['machineCode'] -> [{#'unsigned char'. '[', machineCodeBytes printString, ']'}].
+ ['operands'] -> [{#'unsigned long'. '[', NumOperands, ']'}].
- ['address'] -> ['unsigned long'].
- ['machineCode'] -> [{'unsigned char'. '[', machineCodeBytes printString, ']'}].
- ['operands'] -> [{'unsigned long'. '[', NumOperands, ']'}].
['dependent'] -> ['struct _AbstractInstruction *']}
otherwise:
+ [#'unsigned char'])]]!
- [#char])]]!
Item was changed:
----- Method: CogObjectRepresentationForSpur>>branchIf:notInstanceOfBehavior:target: (in category 'sista support') -----
branchIf: reg notInstanceOfBehavior: classObj target: targetFixUp
"Generate a branch if reg is an instance of classObj, otherwise fall-
through. Cannot change the value of reg (may be used afterwards)."
| classIndex |
<inline: true>
- <var: #jmpImmediate type: #'AbstractInstruction *'>
classIndex := objectMemory classTagForClass: classObj.
(objectMemory isImmediateClass: classObj)
ifTrue:
[self branchIf: reg hasNotImmediateTag: classIndex target: targetFixUp ]
ifFalse:
[cogit MoveR: reg R: TempReg.
(self genJumpImmediateInScratchReg: TempReg) jmpTarget: targetFixUp.
self genGetClassIndexOfNonImm: reg into: TempReg.
self genCmpClassIndex: classIndex R: TempReg.
cogit JumpNonZero: targetFixUp ].
^0!
Item was changed:
----- Method: StackToRegisterMappingCogit>>allocateRegisterNotConflictingWith: (in category 'simulation stack') -----
+ allocateRegisterNotConflictingWith: regMask
- allocateRegisterNotConflictingWith: registerMask
| reg |
"if there's a free register, use it"
+ reg := backEnd availableRegisterOrNilFor: (self liveRegisters bitOr: regMask).
+ reg ifNil: "No free register, choose one that does not conflict with regMask"
+ [reg := self freeRegisterNotConflictingWith: regMask].
- reg := backEnd availableRegisterOrNilFor: (self liveRegisters bitOr: registerMask).
- reg ifNil: "No free register, choose one that does not conflict with registerMask"
- [reg := self freeRegisterNotConflictingWith: registerMask].
reg = ReceiverResultReg ifTrue: "If we've allocated RcvrResultReg, it's not live anymore"
[ optStatus isReceiverResultRegLive: false ].
^ reg!
Item was changed:
----- Method: StackToRegisterMappingCogit>>freeRegisterNotConflictingWith: (in category 'simulation stack') -----
+ freeRegisterNotConflictingWith: regMask
+ "Spill the closest register on stack not conflicting with regMask.
+ Assertion Failure if regMask has already all the registers"
- freeRegisterNotConflictingWith: registerMask
- "Spill the closest register on stack not conflicting with registerMask.
- Assertion Failure if registerMask has already all the registers"
<var: #desc type: #'CogSimStackEntry *'>
| reg index |
index := simSpillBase max: 0.
[reg isNil and: [index < simStackPtr] ] whileTrue:
[ | desc |
desc := self simStackAt: index.
desc type = SSRegister ifTrue:
+ [ (regMask anyMask: (self registerMaskFor: desc register)) ifFalse:
- [ (registerMask anyMask: (self registerMaskFor: desc register)) ifFalse:
[ reg := desc register ] ].
index := index + 1].
self assert: reg notNil.
self ssAllocateRequiredReg: reg.
^reg!
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