[Vm-dev] [commit][3390] CogVM source as per VMMaker.oscog-eem.1388
commits at squeakvm.org
commits at squeakvm.org
Sat Jun 27 04:28:56 UTC 2015
Revision: 3390
Author: eliot
Date: 2015-06-26 21:28:55 -0700 (Fri, 26 Jun 2015)
Log Message:
-----------
CogVM source as per VMMaker.oscog-eem.1388
Newspeak:
Declare EnforceAccessControl so it can be overridden at compile time.
Modify Slang to provide const:declareC: for this purpose.
Add inline decls to the access modifier accessors and use the is[Public|
Protected|Private]Method: forms. Use the class vars for the access codes.
Set lkupClass when MNU because of protected method in lookupOrdinaryNoMNUEtcInClass:. Remove duplicate lookup in findNewMethodInClassTag:.
Distinguish lookup for ordinary sends and for MNU processing in the JIT.
Skip private methods and stop on protected methods in ordinary lookup.
This should complete Newspeak access control.
ARM Cogit:
Add hardware FP support for ARM.
Runs all SUnit tests and assorted benchmarks ok, makes nbody 3X faster.
Probably some cleaning up to do, possibly more careful NaN handling etc.
Modified Paths:
--------------
branches/Cog/nsspursrc/vm/cogit.h
branches/Cog/nsspursrc/vm/cogitARMv5.c
branches/Cog/nsspursrc/vm/cogitIA32.c
branches/Cog/nsspursrc/vm/cointerp.c
branches/Cog/nsspursrc/vm/cointerp.h
branches/Cog/nsspursrc/vm/gcc3x-cointerp.c
branches/Cog/nsspurstack64src/vm/gcc3x-interp.c
branches/Cog/nsspurstack64src/vm/interp.c
branches/Cog/nsspurstacksrc/vm/gcc3x-interp.c
branches/Cog/nsspurstacksrc/vm/interp.c
branches/Cog/spursistasrc/vm/cogit.h
branches/Cog/spursistasrc/vm/cogitARMv5.c
branches/Cog/spursistasrc/vm/cogitIA32.c
branches/Cog/spursistasrc/vm/cointerp.c
branches/Cog/spursistasrc/vm/cointerp.h
branches/Cog/spursistasrc/vm/gcc3x-cointerp.c
branches/Cog/spursrc/vm/cogit.h
branches/Cog/spursrc/vm/cogitARMv5.c
branches/Cog/spursrc/vm/cogitIA32.c
branches/Cog/spursrc/vm/cointerp.c
branches/Cog/spursrc/vm/cointerp.h
branches/Cog/spursrc/vm/gcc3x-cointerp.c
branches/Cog/spurstack64src/vm/gcc3x-interp.c
branches/Cog/spurstack64src/vm/interp.c
branches/Cog/spurstacksrc/vm/gcc3x-interp.c
branches/Cog/spurstacksrc/vm/interp.c
branches/Cog/src/vm/cogit.h
branches/Cog/src/vm/cogitARMv5.c
branches/Cog/src/vm/cogitIA32.c
branches/Cog/src/vm/cointerp.c
branches/Cog/src/vm/cointerp.h
branches/Cog/src/vm/cointerpmt.c
branches/Cog/src/vm/cointerpmt.h
branches/Cog/src/vm/gcc3x-cointerp.c
branches/Cog/src/vm/gcc3x-cointerpmt.c
branches/Cog/stacksrc/vm/gcc3x-interp.c
branches/Cog/stacksrc/vm/interp.c
Property Changed:
----------------
branches/Cog/platforms/Cross/vm/sqSCCSVersion.h
Modified: branches/Cog/nsspursrc/vm/cogit.h
===================================================================
--- branches/Cog/nsspursrc/vm/cogit.h 2015-06-25 20:55:14 UTC (rev 3389)
+++ branches/Cog/nsspursrc/vm/cogit.h 2015-06-27 04:28:55 UTC (rev 3390)
@@ -1,5 +1,5 @@
/* Automatically generated by
- CCodeGenerator VMMaker.oscog-eem.1380 uuid: 582c96d5-f95a-4916-a11d-62c452accc31
+ CCodeGenerator VMMaker.oscog-eem.1388 uuid: 5946eb20-1cae-4cba-98b5-467aa146ffab
*/
Modified: branches/Cog/nsspursrc/vm/cogitARMv5.c
===================================================================
--- branches/Cog/nsspursrc/vm/cogitARMv5.c 2015-06-25 20:55:14 UTC (rev 3389)
+++ branches/Cog/nsspursrc/vm/cogitARMv5.c 2015-06-27 04:28:55 UTC (rev 3390)
@@ -1,9 +1,9 @@
/* Automatically generated by
- CCodeGenerator VMMaker.oscog-cb.1379 uuid: cc44db6e-5fe4-4aee-9a1b-e6de870b83a8
+ CCodeGenerator VMMaker.oscog-eem.1388 uuid: 5946eb20-1cae-4cba-98b5-467aa146ffab
from
- StackToRegisterMappingCogit VMMaker.oscog-cb.1379 uuid: cc44db6e-5fe4-4aee-9a1b-e6de870b83a8
+ StackToRegisterMappingCogit VMMaker.oscog-eem.1388 uuid: 5946eb20-1cae-4cba-98b5-467aa146ffab
*/
-static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-cb.1379 uuid: cc44db6e-5fe4-4aee-9a1b-e6de870b83a8 " __DATE__ ;
+static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1388 uuid: 5946eb20-1cae-4cba-98b5-467aa146ffab " __DATE__ ;
char *__cogitBuildInfo = __buildInfo;
@@ -171,6 +171,14 @@
#define ConstZero 1
#define ConvertRRd 117
#define CS 2
+#define D0 0
+#define D1 1
+#define D2 2
+#define D3 3
+#define D4 4
+#define D5 5
+#define D6 6
+#define D7 7
#define Debug DEBUGVM
#define DisplacementMask 0x1F
#define DisplacementX2N 0
@@ -178,6 +186,11 @@
#define DPFPReg0 -9
#define DPFPReg1 -10
#define DPFPReg2 -11
+#define DPFPReg3 -12
+#define DPFPReg4 -13
+#define DPFPReg5 -14
+#define DPFPReg6 -15
+#define DPFPReg7 -16
#define EncounteredUnknownBytecode -6
#define EQ 0
#define Fill16 6
@@ -431,27 +444,21 @@
static sqInt computeMaximumSize(AbstractInstruction * self_in_computeMaximumSize) NoDbgRegParms;
static sqInt concreteCalleeSavedRegisterMask(AbstractInstruction * self_in_concreteCalleeSavedRegisterMask) NoDbgRegParms;
static sqInt concreteCallerSavedRegisterMask(AbstractInstruction * self_in_concreteCallerSavedRegisterMask) NoDbgRegParms;
+static sqInt concreteDPFPRegister(AbstractInstruction * self_in_concreteDPFPRegister, sqInt registerIndex) NoDbgRegParms;
static sqInt concreteRegister(AbstractInstruction * self_in_concreteRegister, sqInt registerIndex) NoDbgRegParms;
-static AbstractInstruction * concretizeAddRdRd(AbstractInstruction * self_in_concretizeAddRdRd) NoDbgRegParms;
static sqInt concretizeAt(AbstractInstruction * self_in_concretizeAt, sqInt actualAddress) NoDbgRegParms;
static usqInt concretizeCMPSMULL(AbstractInstruction * self_in_concretizeCMPSMULL) NoDbgRegParms;
-static AbstractInstruction * concretizeCmpRdRd(AbstractInstruction * self_in_concretizeCmpRdRd) NoDbgRegParms;
static void concretizeConditionalInstruction(AbstractInstruction * self_in_concretizeConditionalInstruction) NoDbgRegParms;
-static AbstractInstruction * concretizeConvertRRd(AbstractInstruction * self_in_concretizeConvertRRd) NoDbgRegParms;
-static AbstractInstruction * concretizeDivRdRd(AbstractInstruction * self_in_concretizeDivRdRd) NoDbgRegParms;
static AbstractInstruction * concretizeFill16(AbstractInstruction * self_in_concretizeFill16) NoDbgRegParms;
static usqInt concretizeFill32(AbstractInstruction * self_in_concretizeFill32) NoDbgRegParms;
static AbstractInstruction * concretizeFillFromWord(AbstractInstruction * self_in_concretizeFillFromWord) NoDbgRegParms;
-static AbstractInstruction * concretizeMoveM64rRd(AbstractInstruction * self_in_concretizeMoveM64rRd) NoDbgRegParms;
-static AbstractInstruction * concretizeMoveRdM64r(AbstractInstruction * self_in_concretizeMoveRdM64r) NoDbgRegParms;
static usqInt concretizeMSR(AbstractInstruction * self_in_concretizeMSR) NoDbgRegParms;
-static AbstractInstruction * concretizeMulRdRd(AbstractInstruction * self_in_concretizeMulRdRd) NoDbgRegParms;
static usqInt concretizeSMULL(AbstractInstruction * self_in_concretizeSMULL) NoDbgRegParms;
-static AbstractInstruction * concretizeSqrtRd(AbstractInstruction * self_in_concretizeSqrtRd) NoDbgRegParms;
-static AbstractInstruction * concretizeSubRdRd(AbstractInstruction * self_in_concretizeSubRdRd) NoDbgRegParms;
static sqInt cResultRegister(AbstractInstruction * self_in_cResultRegister) NoDbgRegParms;
static sqInt dataOpTyperdrnrmlsr(AbstractInstruction * self_in_dataOpTyperdrnrmlsr, sqInt armOpcode, sqInt destReg, sqInt srcReg, sqInt addReg, sqInt shft) NoDbgRegParms;
static void dispatchConcretize(AbstractInstruction * self_in_dispatchConcretize) NoDbgRegParms;
+static sqInt fmsrFromto(AbstractInstruction * self_in_fmsrFromto, sqInt regA, sqInt regB) NoDbgRegParms;
+static sqInt fsitodFromto(AbstractInstruction * self_in_fsitodFromto, sqInt regA, sqInt regB) NoDbgRegParms;
static sqInt fullCallsAreRelative(AbstractInstruction * self_in_fullCallsAreRelative) NoDbgRegParms;
static sqInt genAlignCStackSavingRegistersnumArgswordAlignment(AbstractInstruction * self_in_genAlignCStackSavingRegistersnumArgswordAlignment, sqInt saveRegs, sqInt numArgs, sqInt alignment) NoDbgRegParms;
static AbstractInstruction * genDivRRQuoRem(AbstractInstruction * self_in_genDivRRQuoRem, sqInt abstractRegDivisor, sqInt abstractRegDividend, sqInt abstractRegQuotient, sqInt abstractRegRemainder) NoDbgRegParms;
@@ -1202,7 +1209,6 @@
static sqInt tryCollapseTempVectorInitializationOfSize(sqInt slots) NoDbgRegParms;
static sqInt v3or4PushNilSizenumInitialNils(sqInt aMethodObj, sqInt numInitialNils) NoDbgRegParms;
static sqInt v3or4NumPushNils(BytecodeDescriptor *descriptor, sqInt pc, sqInt nExts, sqInt aMethodObj) NoDbgRegParms;
-static sqInt unreachable(void);
/*** Variables ***/
@@ -2492,7 +2498,6 @@
case MoveRXwrR:
case PopR:
case PushR:
- case ConvertRRd:
return 4;
case AlignmentNops:
@@ -2518,6 +2523,7 @@
case JumpFPLessOrEqual:
case JumpFPOrdered:
case JumpFPUnordered:
+ case ConvertRRd:
return 8;
case RetN:
@@ -2698,6 +2704,49 @@
}
+/* Map a possibly abstract double-precision floating-point register into a
+ concrete one.
+ Abstract registers (defined in CogAbstractOpcodes) are all negative. If
+ registerIndex is negative assume it is an abstract register. */
+
+ /* CogARMCompiler>>#concreteDPFPRegister: */
+static sqInt
+concreteDPFPRegister(AbstractInstruction * self_in_concreteDPFPRegister, sqInt registerIndex)
+{
+
+ switch (registerIndex) {
+ case DPFPReg0:
+ return D0;
+
+ case DPFPReg1:
+ return D1;
+
+ case DPFPReg2:
+ return D2;
+
+ case DPFPReg3:
+ return D3;
+
+ case DPFPReg4:
+ return D4;
+
+ case DPFPReg5:
+ return D5;
+
+ case DPFPReg6:
+ return D6;
+
+ case DPFPReg7:
+ return D7;
+
+ default:
+ assert(((registerIndex >= D0) && (registerIndex <= D7)));
+ return registerIndex;
+
+ }
+}
+
+
/* Map a possibly abstract register into a concrete one. Abstract registers
(defined in CogAbstractOpcodes) are all negative. If registerIndex is
negative assume it is an abstract register. */
@@ -2762,16 +2811,7 @@
}
}
- /* CogARMCompiler>>#concretizeAddRdRd */
-static AbstractInstruction *
-concretizeAddRdRd(AbstractInstruction * self_in_concretizeAddRdRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeAddRdRd;
-}
-
/* Generate concrete machine code for the instruction at actualAddress,
setting machineCodeSize, and answer the following address. */
@@ -2807,16 +2847,7 @@
return ((self_in_concretizeCMPSMULL->machineCodeSize) = 4);
}
- /* CogARMCompiler>>#concretizeCmpRdRd */
-static AbstractInstruction *
-concretizeCmpRdRd(AbstractInstruction * self_in_concretizeCmpRdRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeCmpRdRd;
-}
-
/* Concretize the current instruction, but with a condition. */
/* CogARMCompiler>>#concretizeConditionalInstruction */
@@ -2843,25 +2874,7 @@
return;
}
- /* CogARMCompiler>>#concretizeConvertRRd */
-static AbstractInstruction *
-concretizeConvertRRd(AbstractInstruction * self_in_concretizeConvertRRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeConvertRRd;
-}
- /* CogARMCompiler>>#concretizeDivRdRd */
-static AbstractInstruction *
-concretizeDivRdRd(AbstractInstruction * self_in_concretizeDivRdRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeDivRdRd;
-}
-
-
/* fill with (operand 0 bitAnd: 16rFFFF) according to the processor's
endianness
*/
@@ -2899,25 +2912,7 @@
return self_in_concretizeFillFromWord;
}
- /* CogARMCompiler>>#concretizeMoveM64rRd */
-static AbstractInstruction *
-concretizeMoveM64rRd(AbstractInstruction * self_in_concretizeMoveM64rRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeMoveM64rRd;
-}
- /* CogARMCompiler>>#concretizeMoveRdM64r */
-static AbstractInstruction *
-concretizeMoveRdM64r(AbstractInstruction * self_in_concretizeMoveRdM64r)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeMoveRdM64r;
-}
-
-
/* Generate an MSR CPSR_f, #flags instruction.
Note that we only have business with the NZCV flags so we use
N -> 8
@@ -2942,16 +2937,7 @@
return ((self_in_concretizeMSR->machineCodeSize) = 4);
}
- /* CogARMCompiler>>#concretizeMulRdRd */
-static AbstractInstruction *
-concretizeMulRdRd(AbstractInstruction * self_in_concretizeMulRdRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeMulRdRd;
-}
-
/* Generate an SMULL loResultReg, hiResultReg, srcA, srcB instruction */
/* CogARMCompiler>>#concretizeSMULL */
@@ -2975,25 +2961,7 @@
return ((self_in_concretizeSMULL->machineCodeSize) = 4);
}
- /* CogARMCompiler>>#concretizeSqrtRd */
-static AbstractInstruction *
-concretizeSqrtRd(AbstractInstruction * self_in_concretizeSqrtRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeSqrtRd;
-}
- /* CogARMCompiler>>#concretizeSubRdRd */
-static AbstractInstruction *
-concretizeSubRdRd(AbstractInstruction * self_in_concretizeSubRdRd)
-{
- assert(0);
- notYetImplemented();
- return self_in_concretizeSubRdRd;
-}
-
-
/* Answer the abstract register for the C result register.
Only partially implemented. Works on x86 since TempReg = EAX = C result
reg. */
@@ -3147,6 +3115,8 @@
unsigned long destAddr;
sqInt destReg;
sqInt destReg1;
+ sqInt destReg10;
+ sqInt destReg11;
sqInt destReg2;
sqInt destReg3;
sqInt destReg4;
@@ -3162,6 +3132,7 @@
sqInt distReg1;
sqInt distReg2;
sqInt dstReg;
+ sqInt dstReg1;
sqInt flagsOrOpcode;
sqInt flagsOrOpcode1;
sqInt flagsOrOpcode2;
@@ -3170,6 +3141,7 @@
sqInt flagsOrOpcode5;
sqInt flagsOrOpcode6;
sqInt flagsOrOpcode7;
+ sqInt fpReg;
sqInt hb;
sqInt hb1;
sqInt hb2;
@@ -3262,7 +3234,15 @@
AbstractInstruction *jumpTarget114;
AbstractInstruction *jumpTarget115;
AbstractInstruction *jumpTarget116;
+ AbstractInstruction *jumpTarget117;
+ AbstractInstruction *jumpTarget118;
+ AbstractInstruction *jumpTarget119;
AbstractInstruction *jumpTarget12;
+ AbstractInstruction *jumpTarget120;
+ AbstractInstruction *jumpTarget121;
+ AbstractInstruction *jumpTarget122;
+ AbstractInstruction *jumpTarget123;
+ AbstractInstruction *jumpTarget124;
AbstractInstruction *jumpTarget13;
AbstractInstruction *jumpTarget14;
AbstractInstruction *jumpTarget15;
@@ -3278,7 +3258,15 @@
AbstractInstruction *jumpTarget24;
AbstractInstruction *jumpTarget25;
AbstractInstruction *jumpTarget26;
+ AbstractInstruction *jumpTarget27;
+ AbstractInstruction *jumpTarget28;
+ AbstractInstruction *jumpTarget29;
AbstractInstruction *jumpTarget3;
+ AbstractInstruction *jumpTarget30;
+ AbstractInstruction *jumpTarget31;
+ AbstractInstruction *jumpTarget32;
+ AbstractInstruction *jumpTarget33;
+ AbstractInstruction *jumpTarget34;
AbstractInstruction *jumpTarget4;
AbstractInstruction *jumpTarget5;
AbstractInstruction *jumpTarget6;
@@ -3312,10 +3300,12 @@
sqInt offset29;
sqInt offset3;
sqInt offset30;
- sqInt offset4;
+ sqInt offset31;
+ sqInt offset32;
+ long offset4;
sqInt offset5;
sqInt offset6;
- sqInt offset7;
+ long offset7;
sqInt offset8;
sqInt offset9;
sqInt p;
@@ -3352,6 +3342,17 @@
sqInt reg5;
sqInt reg6;
sqInt reg7;
+ sqInt regA;
+ sqInt regB;
+ sqInt regLHS;
+ sqInt regLHS1;
+ sqInt regLHS2;
+ sqInt regLHS3;
+ sqInt regLHS4;
+ sqInt regRHS;
+ sqInt regRHS1;
+ sqInt regRHS2;
+ sqInt regRHS3;
sqInt rn;
sqInt rn1;
sqInt rn10;
@@ -3404,6 +3405,8 @@
sqInt srcReg13;
sqInt srcReg14;
sqInt srcReg15;
+ sqInt srcReg16;
+ sqInt srcReg17;
sqInt srcReg2;
sqInt srcReg3;
sqInt srcReg4;
@@ -3417,6 +3420,8 @@
sqInt u2;
sqInt u3;
sqInt u4;
+ sqInt u5;
+ sqInt u6;
long val;
long val1;
unsigned long val2;
@@ -3581,10 +3586,10 @@
}
assert(jumpTarget12 != 0);
jumpTarget3 = jumpTarget12;
- offset14 = (((sqInt) jumpTarget3)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset14));
+ offset8 = (((sqInt) jumpTarget3)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset8));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((AL << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset14) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((AL << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset8) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3602,10 +3607,10 @@
}
assert(jumpTarget13 != 0);
jumpTarget4 = jumpTarget13;
- offset15 = (((sqInt) jumpTarget4)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset15));
+ offset9 = (((sqInt) jumpTarget4)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset9));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((EQ << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset15) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((EQ << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset9) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3623,10 +3628,10 @@
}
assert(jumpTarget14 != 0);
jumpTarget5 = jumpTarget14;
- offset16 = (((sqInt) jumpTarget5)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset16));
+ offset10 = (((sqInt) jumpTarget5)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset10));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((NE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset16) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((NE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset10) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3643,10 +3648,10 @@
}
assert(jumpTarget15 != 0);
jumpTarget6 = jumpTarget15;
- offset17 = (((sqInt) jumpTarget6)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset17));
+ offset11 = (((sqInt) jumpTarget6)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset11));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((MI << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset17) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((MI << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset11) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3663,10 +3668,10 @@
}
assert(jumpTarget16 != 0);
jumpTarget7 = jumpTarget16;
- offset18 = (((sqInt) jumpTarget7)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset18));
+ offset12 = (((sqInt) jumpTarget7)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset12));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((PL << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset18) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((PL << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset12) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3683,10 +3688,10 @@
}
assert(jumpTarget17 != 0);
jumpTarget8 = jumpTarget17;
- offset19 = (((sqInt) jumpTarget8)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset19));
+ offset13 = (((sqInt) jumpTarget8)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset13));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((VS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset19) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((VS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset13) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3703,10 +3708,10 @@
}
assert(jumpTarget18 != 0);
jumpTarget9 = jumpTarget18;
- offset20 = (((sqInt) jumpTarget9)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset20));
+ offset14 = (((sqInt) jumpTarget9)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset14));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((VC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset20) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((VC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset14) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3724,10 +3729,10 @@
}
assert(jumpTarget19 != 0);
jumpTarget10 = jumpTarget19;
- offset21 = (((sqInt) jumpTarget10)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset21));
+ offset15 = (((sqInt) jumpTarget10)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset15));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((CS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset21) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((CS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset15) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3745,10 +3750,10 @@
}
assert(jumpTarget110 != 0);
jumpTarget20 = jumpTarget110;
- offset22 = (((sqInt) jumpTarget20)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset22));
+ offset16 = (((sqInt) jumpTarget20)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset16));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((CC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset22) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((CC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset16) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3765,10 +3770,10 @@
}
assert(jumpTarget111 != 0);
jumpTarget21 = jumpTarget111;
- offset23 = (((sqInt) jumpTarget21)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset23));
+ offset17 = (((sqInt) jumpTarget21)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset17));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset23) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset17) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3785,10 +3790,10 @@
}
assert(jumpTarget112 != 0);
jumpTarget22 = jumpTarget112;
- offset24 = (((sqInt) jumpTarget22)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset24));
+ offset18 = (((sqInt) jumpTarget22)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset18));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((GE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset24) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((GE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset18) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3805,10 +3810,10 @@
}
assert(jumpTarget113 != 0);
jumpTarget23 = jumpTarget113;
- offset25 = (((sqInt) jumpTarget23)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset25));
+ offset19 = (((sqInt) jumpTarget23)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset19));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((GT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset25) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((GT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset19) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3825,10 +3830,10 @@
}
assert(jumpTarget114 != 0);
jumpTarget24 = jumpTarget114;
- offset26 = (((sqInt) jumpTarget24)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset26));
+ offset20 = (((sqInt) jumpTarget24)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset20));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset26) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset20) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3845,10 +3850,10 @@
}
assert(jumpTarget115 != 0);
jumpTarget25 = jumpTarget115;
- offset27 = (((sqInt) jumpTarget25)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset27));
+ offset21 = (((sqInt) jumpTarget25)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset21));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((HI << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset27) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((HI << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset21) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -3865,146 +3870,194 @@
}
assert(jumpTarget116 != 0);
jumpTarget26 = jumpTarget116;
- offset28 = (((sqInt) jumpTarget26)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
- assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset28));
+ offset22 = (((sqInt) jumpTarget26)) - (((sqInt) (((self_in_dispatchConcretize->address)) + 8)));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset22));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset28) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((LS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset22) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case JumpFPEqual:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset6 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset6 <= 0x1FFFFFC) && (offset6 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget117 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget117);
+ if ((addressIsInInstructions(jumpTarget117))
+ || (jumpTarget117 == (methodLabel()))) {
+ jumpTarget117 = ((AbstractInstruction *) ((jumpTarget117->address)));
+ }
+ assert(jumpTarget117 != 0);
+ jumpTarget27 = jumpTarget117;
+ offset23 = (((sqInt) jumpTarget27)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset23));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((EQ << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset6) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((EQ << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset23) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPNotEqual:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset7 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset7 <= 0x1FFFFFC) && (offset7 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget118 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget118);
+ if ((addressIsInInstructions(jumpTarget118))
+ || (jumpTarget118 == (methodLabel()))) {
+ jumpTarget118 = ((AbstractInstruction *) ((jumpTarget118->address)));
+ }
+ assert(jumpTarget118 != 0);
+ jumpTarget28 = jumpTarget118;
+ offset24 = (((sqInt) jumpTarget28)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset24));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((NE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset7) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((NE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset24) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPLess:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset8 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset8 <= 0x1FFFFFC) && (offset8 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget119 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget119);
+ if ((addressIsInInstructions(jumpTarget119))
+ || (jumpTarget119 == (methodLabel()))) {
+ jumpTarget119 = ((AbstractInstruction *) ((jumpTarget119->address)));
+ }
+ assert(jumpTarget119 != 0);
+ jumpTarget29 = jumpTarget119;
+ offset25 = (((sqInt) jumpTarget29)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset25));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((LT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset8) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((LT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset25) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPGreaterOrEqual:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset9 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset9 <= 0x1FFFFFC) && (offset9 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget120 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget120);
+ if ((addressIsInInstructions(jumpTarget120))
+ || (jumpTarget120 == (methodLabel()))) {
+ jumpTarget120 = ((AbstractInstruction *) ((jumpTarget120->address)));
+ }
+ assert(jumpTarget120 != 0);
+ jumpTarget30 = jumpTarget120;
+ offset26 = (((sqInt) jumpTarget30)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset26));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((GE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset9) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((GE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset26) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPGreater:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset10 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset10 <= 0x1FFFFFC) && (offset10 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget121 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget121);
+ if ((addressIsInInstructions(jumpTarget121))
+ || (jumpTarget121 == (methodLabel()))) {
+ jumpTarget121 = ((AbstractInstruction *) ((jumpTarget121->address)));
+ }
+ assert(jumpTarget121 != 0);
+ jumpTarget31 = jumpTarget121;
+ offset27 = (((sqInt) jumpTarget31)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset27));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((GT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset10) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((GT << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset27) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPLessOrEqual:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset11 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset11 <= 0x1FFFFFC) && (offset11 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget122 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget122);
+ if ((addressIsInInstructions(jumpTarget122))
+ || (jumpTarget122 == (methodLabel()))) {
+ jumpTarget122 = ((AbstractInstruction *) ((jumpTarget122->address)));
+ }
+ assert(jumpTarget122 != 0);
+ jumpTarget32 = jumpTarget122;
+ offset28 = (((sqInt) jumpTarget32)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset28));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((LE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset11) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((LE << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset28) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPOrdered:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset12 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset12 <= 0x1FFFFFC) && (offset12 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget123 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget123);
+ if ((addressIsInInstructions(jumpTarget123))
+ || (jumpTarget123 == (methodLabel()))) {
+ jumpTarget123 = ((AbstractInstruction *) ((jumpTarget123->address)));
+ }
+ assert(jumpTarget123 != 0);
+ jumpTarget33 = jumpTarget123;
+ offset29 = (((sqInt) jumpTarget33)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset29));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((VC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset12) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((VC << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset29) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
case JumpFPUnordered:
/* begin concretizeFPConditionalJump: */
- assert((((self_in_dispatchConcretize->operands))[0]) != 0);
-
- /* signed-conversion for range assertion */
-
- offset13 = ((sqInt) ((((self_in_dispatchConcretize->operands))[0]) - (((self_in_dispatchConcretize->address)) + 8)));
- assert((offset13 <= 0x1FFFFFC) && (offset13 >= -33554432));
+ /* begin computeJumpTargetOffsetPlus: */
+ /* begin jumpTargetAddress */
+ jumpTarget124 = ((AbstractInstruction *) (((self_in_dispatchConcretize->operands))[0]));
+ assertSaneJumpTarget(jumpTarget124);
+ if ((addressIsInInstructions(jumpTarget124))
+ || (jumpTarget124 == (methodLabel()))) {
+ jumpTarget124 = ((AbstractInstruction *) ((jumpTarget124->address)));
+ }
+ assert(jumpTarget124 != 0);
+ jumpTarget34 = jumpTarget124;
+ offset30 = (((sqInt) jumpTarget34)) - (((sqInt) (((self_in_dispatchConcretize->address)) + (8 + 4))));
+ assert(isInImmediateJumpRange(self_in_dispatchConcretize, offset30));
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = 250739216;
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = 4008835600UL;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((VS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset13) >> 2) & 0xFFFFFF)));
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = ((VS << 28) | (((10 | (0 & 1)) << 24) | ((((usqInt) offset30) >> 2) & 0xFFFFFF)));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
@@ -4957,92 +5010,115 @@
case AddRR:
/* begin concretizeDataOperationRR: */
- srcReg7 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg9 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn18 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd16 = rn18;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((AddOpcode << 21) | (1 << 20)))) | ((rn18 << 16) | (rd16 << 12))) | (srcReg7 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((AddOpcode << 21) | (1 << 20)))) | ((rn18 << 16) | (rd16 << 12))) | (srcReg9 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case AndRR:
/* begin concretizeDataOperationRR: */
- srcReg8 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg10 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn19 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd17 = rn19;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((AndOpcode << 21) | (1 << 20)))) | ((rn19 << 16) | (rd17 << 12))) | (srcReg8 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((AndOpcode << 21) | (1 << 20)))) | ((rn19 << 16) | (rd17 << 12))) | (srcReg10 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case CmpRR:
/* begin concretizeDataOperationRR: */
- srcReg9 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg11 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn20 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd18 = 0;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((CmpOpcode << 21) | (1 << 20)))) | ((rn20 << 16) | (rd18 << 12))) | (srcReg9 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((CmpOpcode << 21) | (1 << 20)))) | ((rn20 << 16) | (rd18 << 12))) | (srcReg11 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case OrRR:
/* begin concretizeDataOperationRR: */
- srcReg10 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg12 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn21 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd19 = rn21;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((OrOpcode << 21) | (1 << 20)))) | ((rn21 << 16) | (rd19 << 12))) | (srcReg10 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((OrOpcode << 21) | (1 << 20)))) | ((rn21 << 16) | (rd19 << 12))) | (srcReg12 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case SubRR:
/* begin concretizeDataOperationRR: */
- srcReg11 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg13 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn22 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd20 = rn22;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((SubOpcode << 21) | (1 << 20)))) | ((rn22 << 16) | (rd20 << 12))) | (srcReg11 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((SubOpcode << 21) | (1 << 20)))) | ((rn22 << 16) | (rd20 << 12))) | (srcReg13 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case XorRR:
/* begin concretizeDataOperationRR: */
- srcReg12 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg14 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
rn23 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd21 = rn23;
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((XorOpcode << 21) | (1 << 20)))) | ((rn23 << 16) | (rd21 << 12))) | (srcReg12 & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((XorOpcode << 21) | (1 << 20)))) | ((rn23 << 16) | (rd21 << 12))) | (srcReg14 & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case AddRdRd:
- concretizeAddRdRd(self_in_dispatchConcretize);
+ /* begin concretizeAddRdRd */
+ regRHS = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ regLHS = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = (((3996125952UL | (regLHS << 16)) | (regLHS << 12)) | regRHS);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case CmpRdRd:
- concretizeCmpRdRd(self_in_dispatchConcretize);
+ /* begin concretizeCmpRdRd */
+ regA = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ regB = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = ((4004776768UL | (regB << 12)) | regA);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case DivRdRd:
- concretizeDivRdRd(self_in_dispatchConcretize);
+ /* begin concretizeDivRdRd */
+ regRHS1 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ regLHS1 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = (((4001368832UL | (regLHS1 << 16)) | (regLHS1 << 12)) | regRHS1);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case MulRdRd:
- concretizeMulRdRd(self_in_dispatchConcretize);
+ /* begin concretizeMulRdRd */
+ regRHS2 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ regLHS2 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = (((3995077376UL | (regLHS2 << 16)) | (regLHS2 << 12)) | regRHS2);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case SubRdRd:
- concretizeSubRdRd(self_in_dispatchConcretize);
+ /* begin concretizeSubRdRd */
+ regRHS3 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ regLHS3 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = (((3996126016UL | (regLHS3 << 16)) | (regLHS3 << 12)) | regRHS3);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case SqrtRd:
- concretizeSqrtRd(self_in_dispatchConcretize);
+ /* begin concretizeSqrtRd */
+ regLHS4 = concreteDPFPRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ ((self_in_dispatchConcretize->machineCode))[0] = ((4004580288UL | (regLHS4 << 12)) | regLHS4);
+ ((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
case NegateR:
@@ -5150,9 +5226,9 @@
/* cond 000 1101 0 0000 destR distR 0101 srcR */
- destReg5 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ destReg7 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg5 << 12))) | (((distReg << 8) | (80 | destReg5)) & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg7 << 12))) | (((distReg << 8) | (80 | destReg7)) & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -5163,9 +5239,9 @@
/* cond 000 1101 0 0000 dest dist 0001 srcR */
- destReg6 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ destReg8 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg6 << 12))) | (((distReg1 << 8) | (16 | destReg6)) & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg8 << 12))) | (((distReg1 << 8) | (16 | destReg8)) & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -5176,9 +5252,9 @@
/* cond 000 1101 0 0000 dest dist 0011 srcR */
- destReg7 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ destReg9 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
/* begin machineCodeAt:put: */
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg7 << 12))) | (((distReg2 << 8) | (48 | destReg7)) & 0xFFF));
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = ((((AL << 28) | ((0 << 25) | ((MoveOpcode << 21) | (1 << 20)))) | ((0 << 16) | (destReg9 << 12))) | (((distReg2 << 8) | (48 | destReg9)) & 0xFFF));
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
@@ -5284,12 +5360,12 @@
case MoveAwR:
/* begin concretizeMoveAwR */
srcAddr = ((self_in_dispatchConcretize->operands))[0];
- destReg8 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+ destReg10 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
if ((srcAddr != null)
&& ((srcAddr >= (varBaseAddress()))
&& ((srcAddr - (varBaseAddress())) < (1 << 12)))) {
/* begin machineCodeAt:put: */
- aWord58 = ldrrnplusImm(self_in_dispatchConcretize, destReg8, ConcreteVarBaseReg, srcAddr - (varBaseAddress()));
+ aWord58 = ldrrnplusImm(self_in_dispatchConcretize, destReg10, ConcreteVarBaseReg, srcAddr - (varBaseAddress()));
((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord58;
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 4);
@@ -5306,7 +5382,7 @@
self_in_dispatchConcretize;
instrOffset19 = ((self_in_dispatchConcretize->machineCodeSize) = 4);
/* begin machineCodeAt:put: */
- aWord119 = ldrrnplusImm(self_in_dispatchConcretize, destReg8, ConcreteIPReg, 0);
+ aWord119 = ldrrnplusImm(self_in_dispatchConcretize, destReg10, ConcreteIPReg, 0);
((self_in_dispatchConcretize->machineCode))[instrOffset19 / 4] = aWord119;
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = instrOffset19 + 4);
@@ -5314,13 +5390,13 @@
case MoveRAw:
/* begin concretizeMoveRAw */
- srcReg13 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
+ srcReg15 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[0]);
destAddr = ((self_in_dispatchConcretize->operands))[1];
if ((destAddr != null)
@@ Diff output truncated at 50000 characters. @@
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