[Vm-dev] VM Maker: Cog-eem.251.mcz

commits at source.squeak.org commits at source.squeak.org
Thu Mar 26 06:35:25 UTC 2015


Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.251.mcz

==================== Summary ====================

Name: Cog-eem.251
Author: eem
Time: 25 March 2015, 11:35:11.171 pm
UUID: d4ffc6f0-805a-4538-a6fc-241c945f42d8
Ancestors: Cog-eem.250

Nuke the mistaken verbiage in GdbARMAlien>>
handleExecutionPrimitiveFailureIn:minimumAddress:
that attempts to infer pc from lr.  Hold onto the
actual pc in a temp for debugging.

Make sure GdbARMAlien>>simulateJumpCallOf:memory:
pushes the link register when it builds its frame.

Clarify the comment in GdbARMAlien>>retpcIn:.

Add lr to the registers to smash on call.

Dpon't bother to pop retpc through lr in simulateReturnIn:

=============== Diff against Cog-eem.250 ===============

Item was changed:
  ----- Method: GdbARMAlien>>callerSavedSmashRegisterAccessors (in category 'accessing-abstract') -----
  callerSavedSmashRegisterAccessors
+ 	^#(r0: r1: r2: r3: lr:)!
- 	^#(r0: r1: r2: r3: )!

Item was changed:
  ----- Method: GdbARMAlien>>handleExecutionPrimitiveFailureIn:minimumAddress: (in category 'error handling') -----
  handleExecutionPrimitiveFailureIn: memoryArray "<Bitmap|ByteArray>" minimumAddress: minimumAddress "<Integer>"
  	"Handle an execution primitive failure.  Convert out-of-range call and absolute
  	 memory read into register instructions into ProcessorSimulationTrap signals."
  	"self printRegistersOn: Transcript"
+ 	| pcOnEntry pc |
+ 	pcOnEntry := self pc.
+ 	self endCondition = 5 ifTrue:
+ 		[self pc: self priorPc].
- 	| pc |
- 	self endCondition = 5 ifTrue:[self pc: self priorPc].
  	((pc := self pc) between: minimumAddress and: memoryArray byteSize - 1) ifTrue:
  		[(self instructionTypeAt: pc in: memoryArray)
  			caseOf: {
  				[#Call] 			-> [^self handleCallFailureAt: pc in: memoryArray].
  				[#LongCall] 	-> [^self handleLongCallFailureAt: pc in: memoryArray].
  				[#Jump] 		-> [^self handleJmpFailureAt: pc in: memoryArray].
  				[#LongJump] 	-> [^self handleLongJmpFailureAt: pc in: memoryArray].
  				[#MoveAwR]	-> [^self handleMoveAwRFailureAt: pc in: memoryArray].
  				[#MoveMbrR]	-> [^self handleMoveMbrRFailureAt: pc in: memoryArray].
  				[#MoveRAw]	-> [^self handleMoveRAwFailureAt: pc in: memoryArray].
  				[#MoveRMbr]	-> [^self handleMoveRMbrFailureAt: pc in: memoryArray].
  				[#Ret]			-> [^self handleRetFailureAt: pc in: memoryArray].} 
  			otherwise: [^self handleExecutionPrimitiveFailureAt: pc in: memoryArray]].
- 
- 	pc = 0 ifTrue:[self halt: 'pc should not be 0 at this point; simulator failure'].
- 
- 	((pc := self lr - 4) between: minimumAddress and: memoryArray byteSize - 1) ifTrue:
- 		[(self instructionTypeAt: pc in: memoryArray)
- 			caseOf: {
- 				[#Call] 		-> [^self handleCallFailureAt: pc in: memoryArray].
- 				[#LongCall] -> [^self handleLongCallFailureAt: pc in: memoryArray].
- 				[#Jump] 	-> [^self handleJmpFailureAt: pc in: memoryArray].
- 				[#LongJump] 	-> [^self handleLongJmpFailureAt: pc in: memoryArray].
- 				[#Ret]		-> [^self handleRetFailureAt: pc in: memoryArray].} 
- 			otherwise: [^self handleExecutionPrimitiveFailureAt: pc in: memoryArray]].
  	^self reportPrimitiveFailure!

Item was changed:
  ----- Method: GdbARMAlien>>retpcIn: (in category 'accessing-abstract') -----
  retpcIn: aMemory
+ 	"The return address is on the stack, having been pushed by either
+ 	 simulateCallOf:nextpc:memory: or simulateJumpCallOf:memory:"
- "the return address is on the stack, apparently"
  	^aMemory unsignedLongAt: self fp + 5 bigEndian: false!

Item was changed:
  ----- Method: GdbARMAlien>>simulateJumpCallOf:memory: (in category 'execution simulation') -----
  simulateJumpCallOf: address memory: aMemory
  	"Simulate a frame-building jump of address.  Build a frame since
  	a) this is used for calls into the run-time which are unlikely to be leaf-calls"
  	"This method builds a stack frame as expected by the simulator, not as defined by ARM aapcs-abi.
  	In ARM aapcs, every method can define for itself, wether it wants to push lr (nextpc), and wether it 
  	uses a frame pointer. The standard never mentions a fp. It merely defines r4-r11 to be callee-saved."
  
  	self assert: self sp \\ 8 = 0. "This check ensures, that we conform with ARM abi. Before doing anything to the stack, we ensure 2-word alignment."
+ 	self pushWord: self lr in: aMemory.
  	self pushWord: self fp in: aMemory.
  	self fp: self sp.
  	PostBuildStackDelta ~= 0 ifTrue:
  		[self sp: self sp - PostBuildStackDelta]. "In order to satisfy the CStackAlignment check by cogit, which is only valid on IA32 platforms."
  	self pc: address!

Item was changed:
  ----- Method: GdbARMAlien>>simulateReturnIn: (in category 'execution simulation') -----
  simulateReturnIn: aMemory
  	PostBuildStackDelta ~= 0 ifTrue:
  		[self sp: self sp + PostBuildStackDelta].
  	self fp: (self popWordIn: aMemory).
+ 	"According to tpr, most C compilers implement return by simply
+ 	 popping into the pc, rather than popping through the link register."
+ 	self pc: (self popWordIn: aMemory)!
- 	self lr: (self popWordIn: aMemory).
- 	self pc: self lr!



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