[Vm-dev] VM Maker: VMMaker.oscog-eem.1128.mcz

commits at source.squeak.org commits at source.squeak.org
Sat Mar 28 21:28:19 UTC 2015


Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1128.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.1128
Author: eem
Time: 28 March 2015, 2:26:04.224 pm
UUID: 4947273c-262c-4a41-bec3-ad0e940276b3
Ancestors: VMMaker.oscog-eem.1127

Oops!  remember to answer an abstract register
derived mask for ARM's callerSavedRegisterMask.

Change the ARM reg assignments to use r0 for
TempReg and r7 for ResultReceiverReg.

At some stage (e.g. when Clément arrives to work
on Sista) the register mask machinery may have to
change to use concrete register numbers to allow
the allocator to allocate more registers than can
be named as abstract registers.

=============== Diff against VMMaker.oscog-eem.1127 ===============

Item was changed:
  ----- Method: CogARMCompiler>>callerSavedRegisterMask (in category 'accessing') -----
  callerSavedRegisterMask
  	"According to IHI0042E ARM Architecture Procedure Calling Standard, in section 5.1.1:
  		A subroutine must preserve the contents of the registers r4-r8, r10, r11 and SP (and r9 in PCS variants that designate r9 as v6).
  	 SP = r13, so the callee-saved regs are r4-r8 & r10-r12.
  	 The caller-saved registers are those that are not callee-saved and not reserved for hardware/abi uses,
+ 	 i..e r0-r3, r9 & r12.  We can't name all the C argument registers.  So..."
+ 	^cogit
+ 		registerMaskFor: (self abstractRegisterForConcreteRegister: 0)
+ 		"and: (self abstractRegisterForConcreteRegister: 1)"
+ 		"and: (self abstractRegisterForConcreteRegister: 2)"
+ 		"and: (self abstractRegisterForConcreteRegister: 3)"
+ 		"and: (self abstractRegisterForConcreteRegister: 9)"
+ 		and: (self abstractRegisterForConcreteRegister: 12)!
- 	 i..e r0-r3, r9 & r12."
- 	^2r1001000001111!

Item was changed:
  ----- Method: CogARMCompiler>>concreteRegister: (in category 'encoding') -----
  concreteRegister: registerIndex
  	 "Map a possibly abstract register into a concrete one.  Abstract registers
  	  (defined in CogAbstractOpcodes) are all negative.  If registerIndex is
  	  negative assume it is an abstract register."
  	
  	"N.B. According to BSABI, R0-R3 are caller-save, R4-R12 are callee save.
  	 Note that R9 might be a special register for the implementation. In some slides
  	 it is refered to as sb. R10 can contain the stack limit (sl), R11 the fp. R12 is an
  	 intra-procedure scratch instruction pointer for link purposes. It can also be used.
  	 R10 is used as temporary inside a single abstract opcode implementation"
  	"R0-R3 are used when calling back to the interpreter. Using them would require
  	 saving and restoring their values, so they are omitted so far. R12 is the only
  	 unused register at the moment.."
  	^registerIndex
  		caseOf: {
+ 			[TempReg]				-> [R0].
- 			[TempReg]				-> [R7].
  			[ClassReg]				-> [R8].
+ 			[ReceiverResultReg]	-> [R7].
- 			[ReceiverResultReg]	-> [R9].
  			[SendNumArgsReg]		-> [R6].
  			[SPReg]					-> [SP]. "R13"
  			[FPReg]					-> [R11].
  			[Arg0Reg]				-> [R4].
  			[Arg1Reg]				-> [R5].
  			[VarBaseReg]			-> [ConcreteVarBaseReg]. "Must be callee saved"
  			[RISCTempReg]			-> [ConcreteIPReg]. "a.k.a. IP"
  			[LinkReg]				-> [LR]. "R14"
  			[PCReg]					-> [PC] "R15" }
  		otherwise:
  			[self assert: (registerIndex between: R0 and: PC).
  			 registerIndex]!



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