[Vm-dev] VM Maker: VMMaker.oscog-eem.1459.mcz

commits at source.squeak.org commits at source.squeak.org
Mon Sep 21 22:31:11 UTC 2015


Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1459.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.1459
Author: eem
Time: 21 September 2015, 3:28:36.804 pm
UUID: f43b14d5-edd9-4ba3-a467-af394e66fdbf
Ancestors: VMMaker.oscog-eem.1458

Finish the binary jump and quick arith tests for x64.  Leaves three failing common tests.

=============== Diff against VMMaker.oscog-eem.1458 ===============

Item was changed:
  ----- Method: AbstractInstructionTests>>runAddCqR: (in category 'running') -----
  runAddCqR: assertPrintBar
  	"self defaultTester runAddCqR: true"
  	"self defaultTester runAddCqR: false"
  	| memory |
  	memory := ByteArray new: 20.
  	self concreteCompilerClass dataRegistersWithAccessorsDo:
  		[:reg :rgetter :rsetter|
  		self pairs: (-2 to: 2)  do:
  			[:a :b| | inst len bogus |
  			inst := self gen: AddCqR operand: a operand: reg.
  			len := inst concretizeAt: 0.
  			memory replaceFrom: 1 to: len with: inst machineCode object startingAt: 1.
  			self processor
  				reset;
+ 				perform: rsetter with: (processor convertIntegerToInternal: b).
- 				perform: rsetter with: b signedIntToLong.
  			[[processor pc < len] whileTrue:
  				[self processor singleStepIn: memory]]
  				on: Error
  				do: [:ex| ].
  			"self processor printRegistersOn: Transcript.
  			 Transcript show: (self processor disassembleInstructionAt: 0 In: memory); cr"
  			assertPrintBar
+ 				ifTrue: [self assert: processor pc equals: inst machineCodeSize.
- 				ifTrue: [self assert: processor pc = inst machineCodeSize.
  						self assertCheckQuickArithOpCodeSize: inst machineCodeSize]
  				ifFalse: [bogus := processor pc ~= inst machineCodeSize].
  			self concreteCompilerClass dataRegistersWithAccessorsDo:
  				[:ireg :getter :setter| | expected |
  				expected := getter == rgetter ifTrue: [a + b] ifFalse: [0].
  				assertPrintBar
+ 					ifTrue: [self assert: (self processor convertInternalToInteger: (self processor perform: getter)) equals: expected]
- 					ifTrue: [self assert: (self processor perform: getter) signedIntFromLong = expected]
  					ifFalse:
+ 						[(self processor convertInternalToInteger: (self processor perform: getter)) ~= expected ifTrue:
- 						[(self processor perform: getter) signedIntFromLong ~= expected ifTrue:
  							[bogus := true]]].
  				assertPrintBar ifFalse:
  					[Transcript
  						nextPutAll: rgetter; nextPut: $(; print: b; nextPutAll: ') + '; print: a; nextPutAll: ' = ';
+ 						print: (self processor convertInternalToInteger: (self processor perform: rgetter)); cr; flush.
- 						print: (self processor perform: rgetter) signedIntFromLong; cr; flush.
  					 bogus ifTrue:
  						[self processor printRegistersOn: Transcript.
  						 Transcript show: (self processor disassembleInstructionAt: 0 In: memory); cr]]]]!

Item was changed:
  ----- Method: AbstractInstructionTests>>runBinaryConditionalJumpsViaCmpCqR: (in category 'running') -----
  runBinaryConditionalJumpsViaCmpCqR: assertPrintBar
  	"self defaultTester runBinaryConditionalJumpsViaCmpCqR: false"
  	| mask reg1 reg2 resultRegNum operandRegNum |
  	mask := (1 << self processor bitsInWord) - 1.
  	resultRegNum := 0.
  	operandRegNum := 1.
  	self concreteCompilerClass dataRegistersWithAccessorsDo:
  		[:n :get :set|
  		n = resultRegNum ifTrue: [reg1 := get].
  		n = operandRegNum ifTrue: [reg2 := set]].
  	#(	(JumpAbove > unsigned)			(JumpBelowOrEqual <= unsigned)
  		(JumpBelow < unsigned)			(JumpAboveOrEqual >= unsigned)
  		(JumpGreater > signed)			(JumpLessOrEqual <= signed)
  		(JumpLess < signed)				(JumpGreaterOrEqual >= signed)
  		(JumpZero = signed)				(JumpNonZero ~= signed)) do:
  		[:triple|
  		[:opName :relation :signednessOrResult| | opcode |
  		opcode := CogRTLOpcodes classPool at: opName.
  		(-2 to: 2) do:
  			[:b| | jumpNotTaken jumpTaken nop memory bogus |
  			self resetGen.
  			self gen: CmpCqR operand: b operand: operandRegNum.
  			jumpTaken := self gen: opcode.
  			self gen: MoveCqR operand: 0 operand: resultRegNum.
  			jumpNotTaken := self gen: Jump.
  			jumpTaken jmpTarget: (self gen: MoveCqR operand: 1 operand: resultRegNum).
  			jumpNotTaken jmpTarget: (nop := self gen: Nop).
  			memory := self generateInstructions.
  			assertPrintBar ifFalse:
  				[Transcript print: triple; cr.
  				 self disassembleOpcodesIn: memory to: Transcript].
  			bogus := false.
  			(-2 to: 2) do:
  				[:a| | taken expected |
  				self processor
  					reset;
+ 					perform: reg2 with: (processor convertIntegerToInternal: a).
- 					perform: reg2 with: a signedIntToLong.
  				[self processor singleStepIn: memory.
  				 self processor pc ~= nop address] whileTrue.
  				taken := (self processor perform: reg1) = 1.
  				expected := signednessOrResult == #unsigned
  								ifTrue: [(a bitAnd: mask) perform: relation with: (b bitAnd: mask)]
  								ifFalse: [a perform: relation with: b].
  				assertPrintBar
  					ifTrue:
+ 						[self assert: taken equals: expected]
- 						[self assert: taken = expected]
  					ifFalse:
  						[Transcript
  							nextPutAll: 'CmpCqR '; print: b; space; nextPutAll: reg2; tab; tab;
  							nextPutAll: reg2; nextPut: $(; print: a; nextPut: $); space;
  							nextPutAll: relation; space; print: b; nextPutAll: ' = ';
  							print: taken;  nextPutAll: ' ('; print: expected; nextPut: $).
  						 taken ~= expected ifTrue:
  							[Transcript nextPutAll: ' !!!!'.
  							 bogus := true].
  						 Transcript cr; flush]].
  				bogus ifTrue:
  					[self processor printRegistersOn: Transcript.
  					 Transcript nextPutAll: jumpTaken symbolic; tab; show: (self processor disassembleInstructionAt: jumpTaken address In: memory); cr]]]
  						valueWithArguments: triple]!

Item was changed:
  ----- Method: AbstractInstructionTests>>runBinaryConditionalJumpsViaSubCqR: (in category 'running') -----
  runBinaryConditionalJumpsViaSubCqR: assertPrintBar
  	"self defaultTester runBinaryConditionalJumpsViaSubCqR: false"
  	| mask reg1 reg2 setreg2 resultRegNum operandRegNum |
  	mask := (1 << self processor bitsInWord) - 1.
  	resultRegNum := 0.
  	operandRegNum := 1.
  	self concreteCompilerClass dataRegistersWithAccessorsDo:
  		[:n :get :set|
  		n = resultRegNum ifTrue: [reg1 := get].
  		n = operandRegNum ifTrue: [reg2 := get. setreg2 := set]].
  	#(	(JumpAbove > unsigned)			(JumpBelowOrEqual <= unsigned)
  		(JumpBelow < unsigned)			(JumpAboveOrEqual >= unsigned)
  		(JumpGreater > signed)			(JumpLessOrEqual <= signed)
  		(JumpLess < signed)				(JumpGreaterOrEqual >= signed)
  		(JumpZero = signed)				(JumpNonZero ~= signed)) do:
  		[:triple|
  		[:opName :relation :signednessOrResult| | opcode |
  		opcode := CogRTLOpcodes classPool at: opName.
  		(-2 to: 2) do:
  			[:b| | jumpNotTaken jumpTaken nop memory bogus |
  			self resetGen.
  			self gen: SubCqR operand: b operand: operandRegNum.
  			jumpTaken := self gen: opcode.
  			self gen: MoveCqR operand: 0 operand: resultRegNum.
  			jumpNotTaken := self gen: Jump.
  			jumpTaken jmpTarget: (self gen: MoveCqR operand: 1 operand: resultRegNum).
  			jumpNotTaken jmpTarget: (nop := self gen: Nop).
  			memory := self generateInstructions.
  			assertPrintBar ifFalse:
  				[Transcript print: triple; cr.
  				 self disassembleOpcodesIn: memory to: Transcript].
  			bogus := false.
  			(-2 to: 2) do:
  				[:a| | taken result expected |
  				self processor
  					reset;
+ 					perform: setreg2 with: (self processor convertIntegerToInternal: a).
- 					perform: setreg2 with: a signedIntToLong.
  				[self processor singleStepIn: memory.
  				 self processor pc ~= nop address] whileTrue.
  				taken := (self processor perform: reg1) = 1.
  				result := signednessOrResult == #unsigned
  							ifTrue: [(a bitAnd: mask) - (b bitAnd: mask)]
  							ifFalse: [a - b].
  				expected := result perform: relation with: 0.
  				assertPrintBar
  					ifTrue:
  						[self assert: (taken = expected
  									  and: [(result bitAnd: mask) = (processor perform: reg2)])]
  					ifFalse:
  						[Transcript
  							nextPutAll: 'SubCqR '; print: b; space; nextPutAll: reg2; tab; tab;
  							print: b; space; nextPutAll: relation; space;
  							nextPutAll: reg2; nextPut: $(; print: a; nextPutAll: ') = ';
  							print: taken;  nextPutAll: ' ('; print: expected; nextPut: $).
  						 taken ~= expected ifTrue:
  							[Transcript nextPutAll: ' !!!!'.
  							 bogus := true].
  						 Transcript cr; flush]].
  				bogus ifTrue:
  					[self processor printRegistersOn: Transcript.
  					 Transcript nextPutAll: jumpTaken symbolic; tab; show: (self processor disassembleInstructionAt: jumpTaken address In: memory); cr]]]
  						valueWithArguments: triple]!

Item was changed:
  ----- Method: AbstractInstructionTests>>runSubCqR: (in category 'running') -----
  runSubCqR: assertPrintBar
  	"self defaultTester runSubCqR: false"
  	| memory |
  	memory := ByteArray new: 16.
  	self concreteCompilerClass dataRegistersWithAccessorsDo:
  		[:reg :rgetter :rsetter|
  		self pairs: (-2 to: 2)  do:
  			[:a :b| | inst len bogus |
  			inst := self gen: SubCqR operand: a operand: reg.
  			len := inst concretizeAt: 0.
  			memory replaceFrom: 1 to: len with: inst machineCode object startingAt: 1.
  			self processor
  				reset;
+ 				perform: rsetter with: (processor convertIntegerToInternal: b).
- 				perform: rsetter with: b signedIntToLong.
  			[[processor pc < len] whileTrue:
  				[self processor singleStepIn: memory]]
  				on: Error
  				do: [:ex| ].
  			"self processor printRegistersOn: Transcript.
  			 Transcript show: (self processor disassembleInstructionAt: 0 In: memory); cr"
  			assertPrintBar
  				ifTrue: [self assert: processor pc = inst machineCodeSize.
  						self assertCheckQuickArithOpCodeSize: inst machineCodeSize]
  				ifFalse: [bogus := processor pc ~= inst machineCodeSize].
  			self concreteCompilerClass dataRegistersWithAccessorsDo:
  				[:ireg :getter :setter| | expected |
  				expected := getter == rgetter ifTrue: [b - a] ifFalse: [0].
  				assertPrintBar
+ 					ifTrue: [self assert: (self processor convertInternalToInteger: (self processor perform: getter)) equals: expected]
- 					ifTrue: [self assert: (self processor perform: getter) signedIntFromLong = expected]
  					ifFalse:
+ 						[(self processor convertInternalToInteger: (self processor perform: getter)) ~= expected ifTrue:
- 						[(self processor perform: getter) signedIntFromLong ~= expected ifTrue:
  							[bogus := true]]].
  				assertPrintBar ifFalse:
  					[Transcript
  						nextPutAll: rgetter; nextPut: $(; print: b; nextPutAll: ') - '; print: a; nextPutAll: ' = ';
+ 						print: (self processor convertInternalToInteger: (self processor perform: rgetter)); cr; flush.
- 						print: (self processor perform: rgetter) signedIntFromLong; cr; flush.
  					 bogus ifTrue:
  						[self processor printRegistersOn: Transcript.
  						 Transcript show: (self processor disassembleInstructionAt: 0 In: memory); cr]]]]!

Item was changed:
  ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') -----
  computeMaximumSize
  	"Compute the maximum size for each opcode.  This allows jump offsets to
  	 be determined, provided that all backward branches are long branches."
  	"N.B.  The ^N forms are to get around the bytecode compiler's long branch
  	 limits which are exceeded when each case jumps around the otherwise."
  	opcode caseOf: {
  		"Noops & Pseudo Ops"
  		[Label]					-> [^0].
  		[AlignmentNops]		-> [^(operands at: 0) - 1].
  		[Fill16]					-> [^2].
  		[Fill32]					-> [^4].
  		[FillFromWord]			-> [^4].
  		[Nop]					-> [^1].
  		"Specific Control/Data Movement"
  		"[CDQ]					-> [^1].
  		[IDIVR]					-> [^2].
  		[IMULRR]				-> [^3].
  		[CPUID]					-> [^2].
  		[CMPXCHGAwR]			-> [^7].
  		[CMPXCHGMwrR]		-> [^8].
  		[LFENCE]				-> [^3].
  		[MFENCE]				-> [^3].
  		[SFENCE]				-> [^3].
  		[LOCK]					-> [^1].
  		[XCHGAwR]				-> [^6].
  		[XCHGMwrR]			-> [^7].
  		[XCHGRR]				-> [^2]."
  		"Control"
  		[CallFull]					-> [^12].
  		[Call]						-> [^5].
  		[JumpR]						-> [^2].
  		[JumpFull]					-> [self resolveJumpTarget. ^12].
  		[JumpLong]					-> [self resolveJumpTarget. ^5].
  		[Jump]						-> [self resolveJumpTarget. ^5].
  		[JumpZero]					-> [self resolveJumpTarget. ^6].
  		[JumpNonZero]				-> [self resolveJumpTarget. ^6].
  		[JumpNegative]				-> [self resolveJumpTarget. ^6].
  		[JumpNonNegative]			-> [self resolveJumpTarget. ^6].
  		[JumpOverflow]				-> [self resolveJumpTarget. ^6].
  		[JumpNoOverflow]			-> [self resolveJumpTarget. ^6].
  		[JumpCarry]				-> [self resolveJumpTarget. ^6].
  		[JumpNoCarry]				-> [self resolveJumpTarget. ^6].
  		[JumpLess]					-> [self resolveJumpTarget. ^6].
  		[JumpGreaterOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpGreater]				-> [self resolveJumpTarget. ^6].
  		[JumpLessOrEqual]			-> [self resolveJumpTarget. ^6].
  		[JumpBelow]				-> [self resolveJumpTarget. ^6].
  		[JumpAboveOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpAbove]				-> [self resolveJumpTarget. ^6].
  		[JumpBelowOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpLongZero]			-> [self resolveJumpTarget. ^6].
  		[JumpLongNonZero]		-> [self resolveJumpTarget. ^6].
  		[JumpFPEqual]				-> [self resolveJumpTarget. ^6].
  		[JumpFPNotEqual]			-> [self resolveJumpTarget. ^6].
  		[JumpFPLess]				-> [self resolveJumpTarget. ^6].
  		[JumpFPGreaterOrEqual]	-> [self resolveJumpTarget. ^6].
  		[JumpFPGreater]			-> [self resolveJumpTarget. ^6].
  		[JumpFPLessOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpFPOrdered]			-> [self resolveJumpTarget. ^6].
  		[JumpFPUnordered]			-> [self resolveJumpTarget. ^6].
  		[RetN]						-> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]].
  		[Stop]						-> [^1].
  
  		"Arithmetic"
  		[AddCqR]		-> [^(self isQuick: (operands at: 0))
  											ifTrue: [4]
  											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
  														ifTrue: [6]
  														ifFalse: [7]]].
+ 		[AndCqR]		-> [^(self isQuick: (operands at: 0))
+ 											ifTrue: [4]
+ 											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
+ 														ifTrue: [6]
+ 														ifFalse: [7]]].
- 		"[AndCqR]		-> [^(self isQuick: (operands at: 0))
- 											ifTrue: [3]
- 											ifFalse: [(self concreteRegister: (operands at: 1)) = EAX
- 														ifTrue: [5]
- 														ifFalse: [6]]].
  		[CmpCqR]		-> [^(self isQuick: (operands at: 0))
+ 											ifTrue: [4]
+ 											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
+ 														ifTrue: [6]
+ 														ifFalse: [7]]].
- 											ifTrue: [3]
- 											ifFalse: [(self concreteRegister: (operands at: 1)) = EAX
- 														ifTrue: [5]
- 														ifFalse: [6]]].
  		[OrCqR]			-> [^(self isQuick: (operands at: 0))
+ 											ifTrue: [4]
+ 											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
+ 														ifTrue: [6]
+ 														ifFalse: [7]]].
- 											ifTrue: [3]
- 											ifFalse: [(self concreteRegister: (operands at: 1)) = EAX
- 														ifTrue: [5]
- 														ifFalse: [6]]].
  		[SubCqR]		-> [^(self isQuick: (operands at: 0))
+ 											ifTrue: [4]
+ 											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
+ 														ifTrue: [6]
+ 														ifFalse: [7]]].
+ 		[TstCqR]		-> [^(self isQuick: (operands at: 0))
+ 											ifTrue: [4]
+ 											ifFalse: [(self concreteRegister: (operands at: 1)) = RAX
+ 														ifTrue: [6]
+ 														ifFalse: [7]]].
+ 		"[AddCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
- 											ifTrue: [3]
- 											ifFalse: [(self concreteRegister: (operands at: 1)) = EAX
- 														ifTrue: [5]
- 														ifFalse: [6]]].
- 		[TstCqR]		-> [^((self isQuick: (operands at: 0)) and: [(self concreteRegister: (operands at: 1)) < 4])
- 											ifTrue: [3]
- 											ifFalse: [(self concreteRegister: (operands at: 1)) = EAX
- 														ifTrue: [5]
- 														ifFalse: [6]]].
- 		[AddCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[AndCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[CmpCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[OrCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[SubCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[XorCwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]."
  		[AddRR]			-> [^3].
  		[AndRR]			-> [^3].
  		[CmpRR]		-> [^3].
  		[OrRR]			-> [^3].
  		[XorRR]			-> [^3].
  		[SubRR]			-> [^3].
  		[NegateR]		-> [^3].
  		"[LoadEffectiveAddressMwrR]
  						-> [^((self isQuick: (operands at: 0))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[LogicalShiftLeftCqR]		-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]].
  		[LogicalShiftRightCqR]		-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]].
  		[ArithmeticShiftRightCqR]	-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]]."
  		[LogicalShiftLeftRR]			-> [^self computeShiftRRSize].
  		[LogicalShiftRightRR]		-> [^self computeShiftRRSize].
  		[ArithmeticShiftRightRR]		-> [^self computeShiftRRSize].
  		[AddRdRd]					-> [^4].
  		[CmpRdRd]					-> [^4].
  		[SubRdRd]					-> [^4].
  		[MulRdRd]					-> [^4].
  		[DivRdRd]					-> [^4].
  		[SqrtRd]					-> [^4].
  		"Data Movement"
  		[MoveCqR]		-> [^(operands at: 0) = 0 ifTrue: [3] ifFalse: [(self is32BitSignedImmediate: (operands at: 0)) ifTrue: [7] ifFalse: [10]]].
  		[MoveCwR]		-> [^10].
  		[MoveRR]		-> [^3].
  		[MoveRdRd]		-> [^4].
  		"[MoveAwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[MoveRAw]		-> [^(self concreteRegister: (operands at: 0)) = EAX ifTrue: [5] ifFalse: [6]].
  		[MoveRMwr]	-> [^((self isQuick: (operands at: 1))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 2)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveRdM64r]	-> [^((self isQuick: (operands at: 1))
  											ifTrue: [5]
  											ifFalse: [8])
  										+ ((self concreteRegister: (operands at: 2)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveMbrR]		-> [^((self isQuick: (operands at: 0))
  											ifTrue: [4]
  											ifFalse: [7])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveRMbr]		-> [^((self isQuick: (operands at: 1))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 2)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveM16rR]	-> [^((self isQuick: (operands at: 0))
  											ifTrue: [4]
  											ifFalse: [7])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveM64rRd]	-> [^((self isQuick: (operands at: 0))
  											ifTrue: [5]
  											ifFalse: [8])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveMwrR]		-> [^((self isQuick: (operands at: 0))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveXbrRR]	-> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP.
  							^(self concreteRegister: (operands at: 1)) = EBP
  											ifTrue: [5]
  											ifFalse: [4]].
  		[MoveRXbrR]	->	[self assert: (self concreteRegister: (operands at: 1)) ~= ESP.
  							^((self concreteRegister: (operands at: 2)) = EBP
  											ifTrue: [4]
  											ifFalse: [3])
  										+ ((self concreteRegister: (operands at: 0)) >= 4
  											ifTrue: [2]
  											ifFalse: [0])].
  		[MoveXwrRR]	-> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP.
  							^(self concreteRegister: (operands at: 1)) = EBP
  											ifTrue: [4]
  											ifFalse: [3]].
  		[MoveRXwrR]	-> [self assert: (self concreteRegister: (operands at: 1)) ~= ESP.
  							^(self concreteRegister: (operands at: 2)) = EBP
  											ifTrue: [4]
  											ifFalse: [3]].
  		[PopR]			-> [^1].
  		[PushR]			-> [^1].
  		[PushCq]		-> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]].
  		[PushCw]		-> [^5].
  		[PrefetchAw]	-> [^self hasSSEInstructions ifTrue: [7] ifFalse: [0]]."
  		"Conversion"
  		"[ConvertRRd]	-> [^4]" }.
  	^0 "to keep C compiler quiet"!

Item was added:
+ ----- Method: CogX64Compiler>>concretizeAddCqR (in category 'generate machine code') -----
+ concretizeAddCqR
+ 	"Will get inlined into concretizeAt: switch."
+ 	<inline: true>
+ 	| mask reg |
+ 	mask := operands at: 0.
+ 	reg := self concreteRegister: (operands at: 1).
+ 	machineCode
+ 		at: 0 put: (self rexR: 0 x: 0 b: reg).
+ 	(self isQuick: mask) ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r83;
+ 			at: 2 put: (self mod: ModReg RM: reg RO: 0);
+ 			at: 3 put: (mask bitAnd: 16rFF).
+ 		 ^machineCodeSize := 4].
+ 	self assert: mask >> 32 = 0.
+ 	reg = RAX ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r05;
+ 			at: 2 put: (mask bitAnd: 16rFF);
+ 			at: 3 put: (mask >> 8 bitAnd: 16rFF);
+ 			at: 4 put: (mask >> 16 bitAnd: 16rFF);
+ 			at: 5 put: (mask >> 24 bitAnd: 16rFF).
+ 		 ^machineCodeSize := 6].
+ 	machineCode
+ 		at: 1 put: 16r81;
+ 		at: 2 put: (self mod: ModReg RM: reg RO: 0);
+ 		at: 3 put: (mask bitAnd: 16rFF);
+ 		at: 4 put: (mask >> 8 bitAnd: 16rFF);
+ 		at: 5 put: (mask >> 16 bitAnd: 16rFF);
+ 		at: 6 put: (mask >> 24 bitAnd: 16rFF).
+ 	 ^machineCodeSize := 7!

Item was added:
+ ----- Method: CogX64Compiler>>concretizeCmpCqR (in category 'generate machine code') -----
+ concretizeCmpCqR
+ 	"Will get inlined into concretizeAt: switch."
+ 	<inline: true>
+ 	| value reg |
+ 	value := operands at: 0.
+ 	reg := self concreteRegister: (operands at: 1).
+ 	machineCode
+ 		at: 0 put: (self rexR: 0 x: 0 b: reg).
+ 	(self isQuick: value) ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r83;
+ 			at: 2 put: (self mod: ModReg RM: reg RO: 7);
+ 			at: 3 put: (value bitAnd: 16rFF).
+ 		 ^machineCodeSize := 4].
+ 	self assert: value >> 32 = 0.
+ 	reg = RAX ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r3D;
+ 			at: 2 put: (value bitAnd: 16rFF);
+ 			at: 3 put: (value >> 8 bitAnd: 16rFF);
+ 			at: 4 put: (value >> 16 bitAnd: 16rFF);
+ 			at: 5 put: (value >> 24 bitAnd: 16rFF).
+ 		 ^machineCodeSize := 6].
+ 	machineCode
+ 		at: 1 put: 16r81;
+ 		at: 2 put: (self mod: ModReg RM: reg RO: 7);
+ 		at: 3 put: (value bitAnd: 16rFF);
+ 		at: 4 put: (value >> 8 bitAnd: 16rFF);
+ 		at: 5 put: (value >> 16 bitAnd: 16rFF);
+ 		at: 6 put: (value >> 24 bitAnd: 16rFF).
+ 	 ^machineCodeSize := 7!

Item was added:
+ ----- Method: CogX64Compiler>>concretizeSubCqR (in category 'generate machine code') -----
+ concretizeSubCqR
+ 	"Will get inlined into concretizeAt: switch."
+ 	<inline: true>
+ 	| value reg |
+ 	value := operands at: 0.
+ 	reg := self concreteRegister: (operands at: 1).
+ 	machineCode
+ 		at: 0 put: (self rexR: 0 x: 0 b: reg).
+ 	(self isQuick: value) ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r83;
+ 			at: 2 put: (self mod: ModReg RM: reg RO: 5);
+ 			at: 3 put: (value bitAnd: 16rFF).
+ 		 ^machineCodeSize := 4].
+ 	self assert: value >> 32 = 0.
+ 	reg = RAX ifTrue:
+ 		[machineCode
+ 			at: 1 put: 16r2D;
+ 			at: 2 put: (value bitAnd: 16rFF);
+ 			at: 3 put: (value >> 8 bitAnd: 16rFF);
+ 			at: 4 put: (value >> 16 bitAnd: 16rFF);
+ 			at: 5 put: (value >> 24 bitAnd: 16rFF).
+ 		 ^machineCodeSize := 6].
+ 	machineCode
+ 		at: 1 put: 16r81;
+ 		at: 2 put: (self mod: ModReg RM: reg RO: 5);
+ 		at: 3 put: (value bitAnd: 16rFF);
+ 		at: 4 put: (value >> 8 bitAnd: 16rFF);
+ 		at: 5 put: (value >> 16 bitAnd: 16rFF);
+ 		at: 6 put: (value >> 24 bitAnd: 16rFF).
+ 	 ^machineCodeSize := 7!

Item was added:
+ ----- Method: CogX64CompilerTests>>assertCheckLongArithOpCodeSize: (in category 'running') -----
+ assertCheckLongArithOpCodeSize: bytes
+ 	self assert: bytes > 5!

Item was added:
+ ----- Method: CogX64CompilerTests>>assertCheckQuickArithOpCodeSize: (in category 'running') -----
+ assertCheckQuickArithOpCodeSize: bytes
+ 	self assert: bytes <= 4!



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