[Vm-dev] VM Maker: VMMaker.oscog-eem.1464.mcz

commits at source.squeak.org commits at source.squeak.org
Wed Sep 23 02:41:59 UTC 2015


Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1464.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.1464
Author: eem
Time: 22 September 2015, 7:39:38.675 pm
UUID: 2f0362da-1883-477a-a0b9-21ef804ceac7
Ancestors: VMMaker.oscog-eem.1463

Implement MoveMwrR for X64.  Extend the operand range tested by testMoveMwrR & testMoveRMwr.

=============== Diff against VMMaker.oscog-eem.1463 ===============

Item was changed:
  ----- Method: CogIA32CompilerTests>>testMoveMwrR (in category 'tests') -----
  testMoveMwrR
  	"self new testMoveMwrR"
  	self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
+ 				[:offset|
+ 				inst := self gen: MoveMwrR operand: offset operand: sreg operand: dreg.
+ 				len := inst concretizeAt: 0.
+ 				self processor
+ 					disassembleInstructionAt: 0
+ 					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
+ 						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movl ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16)]), '(', srname, '), ', drname.
+ 						self assert: (plainJane match: herIntended).
+ 						self assert: len = sz]]]]
+ 
+ 	"| failures |
+ 	 failures := Dictionary new.
+ 	 self concreteCompilerClass registersWithNamesDo:
+ 		[:sreg :srname|
+ 		self concreteCompilerClass registersWithNamesDo:
+ 			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
+ 				[:offset|
+ 				inst := self gen: MoveMwrR operand: offset operand: sreg operand: dreg.
+ 				len := inst concretizeAt: 0.
+ 				self processor
+ 					disassembleInstructionAt: 0
+ 					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
+ 						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movl ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16)]), '(', srname, '), ', drname.
+ 						((plainJane match: herIntended) and: [len = sz]) ifFalse:
+ 							[failures at: herIntended put: plainJane]]]]].
+ 	 failures"!
- 			inst := self gen: MoveMwrR operand: 0 operand: sreg operand: dreg.
- 			len := inst concretizeAt: 0.
- 			self processor
- 				disassembleInstructionAt: 0
- 				In: inst machineCode object
- 				into: [:str :sz| | plainJane herIntended |
- 					plainJane := self strip: str.
- 					herIntended := 'movl (', srname, '), ', drname.
- 					self assert: (plainJane match: herIntended).
- 					self assert: len = sz]]]!

Item was changed:
  ----- Method: CogIA32CompilerTests>>testMoveRMwr (in category 'tests') -----
  testMoveRMwr
  	"self new testMoveRMwr"
  	self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
- 			#(0 64 65536) do:
  				[:offset|
  				inst := self gen: MoveRMwr operand: sreg operand: offset operand: dreg.
  				len := inst concretizeAt: 0.
  				self processor
  					disassembleInstructionAt: 0
  					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
- 					into: [:str :sz| | plainJane herIntended |
  						"Convert e.g. '00000000: movl %eax, 0x2(%eax) : 89 40 02' to  'movl %eax, 0x2(%eax)'"
  						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movl ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16)]), '(',drname,')'.
- 						herIntended := 'movl ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (offset printStringBase: 16)]), '(',drname,')'.
  						self assert: (plainJane match: herIntended).
  						self assert: len = sz]]]]
  
  	"| failures |
  	 failures := Dictionary new.
  	 self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
- 			#(0 64 65536) do:
  				[:offset|
  				inst := self gen: MoveRMwr operand: sreg operand: offset operand: dreg.
  				len := inst concretizeAt: 0.
  				self processor
  					disassembleInstructionAt: 0
  					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
- 					into: [:str :sz| | plainJane herIntended |
  						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movl ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16)]), '(',drname,')'.
- 						herIntended := 'movl ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (offset printStringBase: 16)]), '(',drname,')'.
  						((plainJane match: herIntended) and: [len = sz]) ifFalse:
  							[failures at: herIntended put: plainJane]]]]].
  	 failures"!

Item was changed:
  ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') -----
  computeMaximumSize
  	"Compute the maximum size for each opcode.  This allows jump offsets to
  	 be determined, provided that all backward branches are long branches."
  	"N.B.  The ^N forms are to get around the bytecode compiler's long branch
  	 limits which are exceeded when each case jumps around the otherwise."
  	opcode caseOf: {
  		"Noops & Pseudo Ops"
  		[Label]					-> [^0].
  		[AlignmentNops]		-> [^(operands at: 0) - 1].
  		[Fill16]					-> [^2].
  		[Fill32]					-> [^4].
  		[FillFromWord]			-> [^4].
  		[Nop]					-> [^1].
  		"Specific Control/Data Movement"
  		[CDQ]					-> [^2].
  		[IDIVR]					-> [^3].
  		[IMULRR]				-> [^4].
  		[CPUID]					-> [^2].
  		[CMPXCHGAwR]			-> [^8].
  		[CMPXCHGMwrR]		-> [^9].
  		[LFENCE]				-> [^3].
  		[MFENCE]				-> [^3].
  		[SFENCE]				-> [^3].
  		[LOCK]					-> [^1].
  		"[XCHGAwR]				-> [^6].
  		[XCHGMwrR]			-> [^7]."
  		[XCHGRR]				-> [^((self concreteRegister: (operands at: 0)) = RAX
  									   or: [(self concreteRegister: (operands at: 1)) = RAX])
  											ifTrue: [2]
  											ifFalse: [3]].
  		"Control"
  		[CallFull]					-> [^12].
  		[Call]						-> [^5].
  		[JumpR]						-> [^2].
  		[JumpFull]					-> [self resolveJumpTarget. ^12].
  		[JumpLong]					-> [self resolveJumpTarget. ^5].
  		[Jump]						-> [self resolveJumpTarget. ^5].
  		[JumpZero]					-> [self resolveJumpTarget. ^6].
  		[JumpNonZero]				-> [self resolveJumpTarget. ^6].
  		[JumpNegative]				-> [self resolveJumpTarget. ^6].
  		[JumpNonNegative]			-> [self resolveJumpTarget. ^6].
  		[JumpOverflow]				-> [self resolveJumpTarget. ^6].
  		[JumpNoOverflow]			-> [self resolveJumpTarget. ^6].
  		[JumpCarry]				-> [self resolveJumpTarget. ^6].
  		[JumpNoCarry]				-> [self resolveJumpTarget. ^6].
  		[JumpLess]					-> [self resolveJumpTarget. ^6].
  		[JumpGreaterOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpGreater]				-> [self resolveJumpTarget. ^6].
  		[JumpLessOrEqual]			-> [self resolveJumpTarget. ^6].
  		[JumpBelow]				-> [self resolveJumpTarget. ^6].
  		[JumpAboveOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpAbove]				-> [self resolveJumpTarget. ^6].
  		[JumpBelowOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpLongZero]			-> [self resolveJumpTarget. ^6].
  		[JumpLongNonZero]		-> [self resolveJumpTarget. ^6].
  		[JumpFPEqual]				-> [self resolveJumpTarget. ^6].
  		[JumpFPNotEqual]			-> [self resolveJumpTarget. ^6].
  		[JumpFPLess]				-> [self resolveJumpTarget. ^6].
  		[JumpFPGreaterOrEqual]	-> [self resolveJumpTarget. ^6].
  		[JumpFPGreater]			-> [self resolveJumpTarget. ^6].
  		[JumpFPLessOrEqual]		-> [self resolveJumpTarget. ^6].
  		[JumpFPOrdered]			-> [self resolveJumpTarget. ^6].
  		[JumpFPUnordered]			-> [self resolveJumpTarget. ^6].
  		[RetN]						-> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]].
  		[Stop]						-> [^1].
  
  		"Arithmetic"
  		[AddCqR]		-> [^self computeSizeOfArithCqR].
  		[AndCqR]		-> [^self computeSizeOfArithCqR].
  		[CmpCqR]		-> [^self computeSizeOfArithCqR].
  		[OrCqR]			-> [^self computeSizeOfArithCqR].
  		[SubCqR]		-> [^self computeSizeOfArithCqR].
  		[TstCqR]		-> [^self computeSizeOfArithCqR].
  		[AddCwR]		-> [^self computeSizeOfArithCwR].
  		[AndCwR]		-> [^self computeSizeOfArithCwR].
  		[CmpCwR]		-> [^self computeSizeOfArithCwR].
  		[OrCwR]		-> [^self computeSizeOfArithCwR].
  		[SubCwR]		-> [^self computeSizeOfArithCwR].
  		[XorCwR]		-> [^self computeSizeOfArithCwR].
  		[AddRR]			-> [^3].
  		[AndRR]			-> [^3].
  		[CmpRR]		-> [^3].
  		[OrRR]			-> [^3].
  		[XorRR]			-> [^3].
  		[SubRR]			-> [^3].
  		[NegateR]		-> [^3].
  		"[LoadEffectiveAddressMwrR]
  						-> [^((self isQuick: (operands at: 0))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[LogicalShiftLeftCqR]		-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]].
  		[LogicalShiftRightCqR]		-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]].
  		[ArithmeticShiftRightCqR]	-> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]]."
  		[LogicalShiftLeftRR]			-> [^self computeShiftRRSize].
  		[LogicalShiftRightRR]		-> [^self computeShiftRRSize].
  		[ArithmeticShiftRightRR]		-> [^self computeShiftRRSize].
  		[AddRdRd]					-> [^4].
  		[CmpRdRd]					-> [^4].
  		[SubRdRd]					-> [^4].
  		[MulRdRd]					-> [^4].
  		[DivRdRd]					-> [^4].
  		[SqrtRd]					-> [^4].
  		"Data Movement"
  		[MoveCqR]		-> [^(operands at: 0) = 0 ifTrue: [3] ifFalse: [(self is32BitSignedImmediate: (operands at: 0)) ifTrue: [7] ifFalse: [10]]].
  		[MoveCwR]		-> [^10].
  		[MoveRR]		-> [^3].
  		[MoveRdRd]		-> [^4].
  		"[MoveAwR]		-> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]].
  		[MoveRAw]		-> [^(self concreteRegister: (operands at: 0)) = EAX ifTrue: [5] ifFalse: [6]]."
  		[MoveRMwr]	-> [^((self isQuick: (operands at: 1))
  									ifTrue: [((operands at: 1) = 0
  											and: [((self concreteRegister: (operands at: 2)) bitAnd: 7) ~= RBP])
  												ifTrue: [3]
  												ifFalse: [4]]
  									ifFalse: [7])
  								+ (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP
  									ifTrue: [1]
  									ifFalse: [0])].
  		"[MoveRdM64r]	-> [^((self isQuick: (operands at: 1))
  											ifTrue: [5]
  											ifFalse: [8])
  										+ ((self concreteRegister: (operands at: 2)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveMbrR]		-> [^((self isQuick: (operands at: 0))
  											ifTrue: [4]
  											ifFalse: [7])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveRMbr]		-> [^((self isQuick: (operands at: 1))
  											ifTrue: [3]
  											ifFalse: [6])
  										+ ((self concreteRegister: (operands at: 2)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveM16rR]	-> [^((self isQuick: (operands at: 0))
  											ifTrue: [4]
  											ifFalse: [7])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
  											ifFalse: [0])].
  		[MoveM64rRd]	-> [^((self isQuick: (operands at: 0))
  											ifTrue: [5]
  											ifFalse: [8])
  										+ ((self concreteRegister: (operands at: 1)) = ESP
  											ifTrue: [1]
+ 											ifFalse: [0])]."
- 											ifFalse: [0])].
  		[MoveMwrR]		-> [^((self isQuick: (operands at: 0))
+ 									ifTrue: [((operands at: 0) = 0
+ 											and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP])
+ 												ifTrue: [3]
+ 												ifFalse: [4]]
+ 									ifFalse: [7])
+ 								+ (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP
+ 									ifTrue: [1]
+ 									ifFalse: [0])].
+ 		"[MoveXbrRR]	-> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP.
- 											ifTrue: [3]
- 											ifFalse: [6])
- 										+ ((self concreteRegister: (operands at: 1)) = ESP
- 											ifTrue: [1]
- 											ifFalse: [0])].
- 		[MoveXbrRR]	-> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP.
  							^(self concreteRegister: (operands at: 1)) = EBP
  											ifTrue: [5]
  											ifFalse: [4]].
  		[MoveRXbrR]	->	[self assert: (self concreteRegister: (operands at: 1)) ~= ESP.
  							^((self concreteRegister: (operands at: 2)) = EBP
  											ifTrue: [4]
  											ifFalse: [3])
  										+ ((self concreteRegister: (operands at: 0)) >= 4
  											ifTrue: [2]
  											ifFalse: [0])].
  		[MoveXwrRR]	-> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP.
  							^(self concreteRegister: (operands at: 1)) = EBP
  											ifTrue: [4]
  											ifFalse: [3]].
  		[MoveRXwrR]	-> [self assert: (self concreteRegister: (operands at: 1)) ~= ESP.
  							^(self concreteRegister: (operands at: 2)) = EBP
  											ifTrue: [4]
  											ifFalse: [3]]."
  		[PopR]			-> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]].
  		[PushR]			-> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]].
  		[PushCq]		-> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]].
  		[PushCw]		-> [^self computeSizeOfArithCwR - 1].
  		[PrefetchAw]	-> [^self hasSSEInstructions ifTrue: [12] ifFalse: [0]].
  		"Conversion"
  		"[ConvertRRd]	-> [^4]" }.
  	^0 "to keep C compiler quiet"!

Item was added:
+ ----- Method: CogX64Compiler>>concretizeMoveMwrR (in category 'generate machine code') -----
+ concretizeMoveMwrR
+ 	"Will get inlined into concretizeAt: switch."
+ 	<inline: true>
+ 	| srcReg offset destReg |
+ 	offset := operands at: 0.
+ 	srcReg := self concreteRegister: (operands at: 1).
+ 	destReg := self concreteRegister: (operands at: 2).
+ 	machineCode
+ 		at: 0 put: (self rexR: destReg x: 0 b: srcReg);
+ 		at: 1 put: 16r8B.
+ 	(srcReg ~= RSP and: [srcReg ~= R12]) ifTrue:
+ 		[(offset = 0 and: [srcReg ~= RBP and: [srcReg ~= R13]]) ifTrue:
+ 			[machineCode
+ 				at: 2 put: (self mod: ModRegInd RM: srcReg RO: destReg).
+ 			 ^machineCodeSize := 3].
+ 		(self isQuick: offset) ifTrue:
+ 			[machineCode
+ 				at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg);
+ 				at: 3 put: (offset bitAnd: 16rFF).
+ 			 ^machineCodeSize := 4].
+ 		machineCode
+ 			at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg);
+ 			at: 3 put: (offset bitAnd: 16rFF);
+ 			at: 4 put: (offset >> 8 bitAnd: 16rFF);
+ 			at: 5 put: (offset >> 16 bitAnd: 16rFF);
+ 			at: 6 put: (offset >> 24 bitAnd: 16rFF).
+ 		^machineCodeSize := 7].
+ 	"RSP:"
+ 	offset = 0 ifTrue:
+ 		[machineCode
+ 			at: 2 put: (self mod: ModRegInd RM: srcReg RO: destReg);
+ 			at: 3 put: (self s: SIB1 i: 4 b: srcReg).
+ 		 ^machineCodeSize := 4].
+ 	(self isQuick: offset) ifTrue:
+ 		[machineCode
+ 			at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg);
+ 			at: 3 put: (self s: SIB1 i: 4 b: srcReg);
+ 			at: 4 put: (offset bitAnd: 16rFF).
+ 		 ^machineCodeSize := 5].
+ 	machineCode
+ 		at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg);
+ 		at: 3 put: (self s: SIB1 i: 4 b: srcReg);
+ 		at: 4 put: (offset bitAnd: 16rFF);
+ 		at: 5 put: (offset >> 8 bitAnd: 16rFF);
+ 		at: 6 put: (offset >> 16 bitAnd: 16rFF);
+ 		at: 7 put: (offset >> 24 bitAnd: 16rFF).
+ 	^machineCodeSize := 8!

Item was changed:
  ----- Method: CogX64CompilerTests>>testMoveMwrR (in category 'tests') -----
  testMoveMwrR
  	"self new testMoveMwrR"
  	self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
+ 				[:offset|
+ 				inst := self gen: MoveMwrR operand: offset operand: sreg operand: dreg.
+ 				len := inst concretizeAt: 0.
+ 				self processor
+ 					disassembleInstructionAt: 0
+ 					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
+ 						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movq ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(', srname, '), ', drname.
+ 						self assert: (plainJane match: herIntended).
+ 						self assert: len = sz]]]]
+ 
+ 	"| failures |
+ 	 failures := Dictionary new.
+ 	 self concreteCompilerClass registersWithNamesDo:
+ 		[:sreg :srname|
+ 		self concreteCompilerClass registersWithNamesDo:
+ 			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
+ 				[:offset|
+ 				inst := self gen: MoveMwrR operand: offset operand: sreg operand: dreg.
+ 				len := inst concretizeAt: 0.
+ 				self processor
+ 					disassembleInstructionAt: 0
+ 					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
+ 						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movq ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(', srname, '), ', drname.
+ 						((plainJane match: herIntended) and: [len = sz]) ifFalse:
+ 							[failures at: herIntended put: plainJane]]]]].
+ 	 failures"!
- 			inst := self gen: MoveMwrR operand: 0 operand: sreg operand: dreg.
- 			len := inst concretizeAt: 0.
- 			self processor
- 				disassembleInstructionAt: 0
- 				In: inst machineCode object
- 				into: [:str :sz| | plainJane herIntended |
- 					plainJane := self strip: str.
- 					herIntended := 'movl (', srname, '), ', drname.
- 					self assert: (plainJane match: herIntended).
- 					self assert: len = sz]]]!

Item was changed:
  ----- Method: CogX64CompilerTests>>testMoveRMwr (in category 'tests') -----
  testMoveRMwr
  	"self new testMoveRMwr"
  	self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
- 			#(0 64 65536) do:
  				[:offset|
  				inst := self gen: MoveRMwr operand: sreg operand: offset operand: dreg.
  				len := inst concretizeAt: 0.
  				self processor
  					disassembleInstructionAt: 0
  					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
- 					into: [:str :sz| | plainJane herIntended |
  						"Convert e.g. '00000000: movq %rax, 0x2(%rax) : 48 89 40 02' to  'movl %rax, 0x2(%rax)'"
  						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movq ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(',drname,')'.
- 						herIntended := 'movq ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (offset printStringBase: 16 length: 16 padded: true)]), '(',drname,')'.
  						self assert: (plainJane match: herIntended).
  						self assert: len = sz]]]]
  
  	"| failures |
  	 failures := Dictionary new.
  	 self concreteCompilerClass registersWithNamesDo:
  		[:sreg :srname|
  		self concreteCompilerClass registersWithNamesDo:
  			[:dreg :drname| | inst len |
+ 			#(0 64 65536 -64 -65536) do:
- 			#(0 64 65536) do:
  				[:offset|
  				inst := self gen: MoveRMwr operand: sreg operand: offset operand: dreg.
  				len := inst concretizeAt: 0.
  				self processor
  					disassembleInstructionAt: 0
  					In: inst machineCode object
+ 					into: [:str :sz| | plainJane herIntended po |
- 					into: [:str :sz| | plainJane herIntended |
  						plainJane := self strip: str.
+ 						po := offset bitAnd: 1 << self processor bitsInWord - 1.
+ 						herIntended := 'movq ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(',drname,')'.
- 						herIntended := 'movq ', srname, ', ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (offset printStringBase: 16 length: 16 padded: true)]), '(',drname,')'.
  						((plainJane match: herIntended) and: [len = sz]) ifFalse:
  							[failures at: herIntended put: plainJane]]]]].
  	 failures"!



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