[Vm-dev] VM Maker: VMMaker.oscog-eem.1638.mcz
commits at source.squeak.org
commits at source.squeak.org
Sat Jan 16 03:14:32 UTC 2016
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1638.mcz
==================== Summary ====================
Name: VMMaker.oscog-eem.1638
Author: eem
Time: 16 January 2016, 7:12:50.561101 pm
UUID: fc0ece88-9300-410f-91c2-412f2bfa7772
Ancestors: VMMaker.oscog-eem.1637
Implement MoveRM[16|b]r for MIPSEL and correct machine code size of MoveMbrR/RMbrR.
=============== Diff against VMMaker.oscog-eem.1637 ===============
Item was changed:
----- Method: CogMIPSELCompiler>>computeMaximumSize (in category 'generate machine code') -----
computeMaximumSize
"Each MIPS instruction has 4 bytes. Many abstract opcodes need more than one
instruction. Instructions that refer to constants and/or literals depend on literals
being stored in-line or out-of-line.
N.B. The ^N forms are to get around the bytecode compiler's long branch
limits which are exceeded when each case jumps around the otherwise."
opcode
caseOf: {
[BrEqualRR] -> [^8].
[BrNotEqualRR] -> [^8].
[BrUnsignedLessRR] -> [^12].
[BrUnsignedLessEqualRR] -> [^12].
[BrUnsignedGreaterRR] -> [^12].
[BrUnsignedGreaterEqualRR] -> [^12].
[BrSignedLessRR] -> [^12].
[BrSignedLessEqualRR] -> [^12].
[BrSignedGreaterRR] -> [^12].
[BrSignedGreaterEqualRR] -> [^12].
[BrLongEqualRR] -> [^16].
[BrLongNotEqualRR] -> [^16].
[MulRR] -> [^4].
[DivRR] -> [^4].
[MoveLowR] -> [^4].
[MoveHighR] -> [^4].
"Noops & Pseudo Ops"
[Label] -> [^0].
[Literal] -> [^4].
[AlignmentNops] -> [^(operands at: 0) - 4].
[Fill32] -> [^4].
[Nop] -> [^4].
"Control"
[Call] -> [^self literalLoadInstructionBytes + 8].
[CallFull] -> [^self literalLoadInstructionBytes + 8].
[JumpR] -> [^8].
[Jump] -> [^8].
[JumpFull] -> [^self literalLoadInstructionBytes + 8].
[JumpLong] -> [^self literalLoadInstructionBytes + 8].
[JumpZero] -> [^8].
[JumpNonZero] -> [^8].
[JumpNegative] -> [^8].
[JumpNonNegative] -> [^8].
[JumpOverflow] -> [^8].
[JumpNoOverflow] -> [^8].
[JumpCarry] -> [^8].
[JumpNoCarry] -> [^8].
[JumpLess] -> [^8].
[JumpGreaterOrEqual] -> [^8].
[JumpGreater] -> [^8].
[JumpLessOrEqual] -> [^8].
[JumpBelow] -> [^8].
[JumpAboveOrEqual] -> [^8].
[JumpAbove] -> [^8].
[JumpBelowOrEqual] -> [^8].
[JumpLongZero] -> [^self literalLoadInstructionBytes + 8].
[JumpLongNonZero] -> [^self literalLoadInstructionBytes + 8].
[JumpFPEqual] -> [^8].
[JumpFPNotEqual] -> [^8].
[JumpFPLess] -> [^8].
[JumpFPGreaterOrEqual]-> [^8].
[JumpFPGreater] -> [^8].
[JumpFPLessOrEqual] -> [^8].
[JumpFPOrdered] -> [^8].
[JumpFPUnordered] -> [^8].
[RetN] -> [^8].
[Stop] -> [^4].
"Arithmetic"
[AddCqR] -> [^12].
[AndCqR] -> [^16].
[AndCqRR] -> [^12].
[CmpCqR] -> [^28].
[OrCqR] -> [^12].
[SubCqR] -> [^12].
[TstCqR] -> [^12].
[XorCqR] -> [^12].
[AddCwR] -> [^12].
[AndCwR] -> [^12].
[CmpCwR] -> [^28].
[OrCwR] -> [^12].
[SubCwR] -> [^12].
[XorCwR] -> [^12].
[AddRR] -> [^4].
[AndRR] -> [^4].
[CmpRR] -> [^20].
[OrRR] -> [^4].
[XorRR] -> [^4].
[SubRR] -> [^4].
[NegateR] -> [^4].
[LoadEffectiveAddressMwrR] -> [^12].
[LogicalShiftLeftCqR] -> [^4].
[LogicalShiftRightCqR] -> [^4].
[ArithmeticShiftRightCqR] -> [^4].
[LogicalShiftLeftRR] -> [^4].
[LogicalShiftRightRR] -> [^4].
[ArithmeticShiftRightRR] -> [^4].
[AddRdRd] -> [^4].
[CmpRdRd] -> [^4].
[SubRdRd] -> [^4].
[MulRdRd] -> [^4].
[DivRdRd] -> [^4].
[SqrtRd] -> [^4].
[AddCheckOverflowCqR] -> [^28].
[AddCheckOverflowRR] -> [^20].
[SubCheckOverflowCqR] -> [^28].
[SubCheckOverflowRR] -> [^20].
[MulCheckOverflowRR] -> [^20].
"Data Movement"
[MoveCqR] -> [^8 "or 4"].
[MoveCwR] -> [^8].
[MoveRR] -> [^4].
[MoveRdRd] -> [^4].
[MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0))
ifTrue: [4]
ifFalse: [self literalLoadInstructionBytes + 4]].
[MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1))
ifTrue: [4]
ifFalse: [self literalLoadInstructionBytes + 4]].
[MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0))
ifTrue: [4]
ifFalse: [self literalLoadInstructionBytes + 4]].
[MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1))
ifTrue: [4]
ifFalse: [self literalLoadInstructionBytes + 4]].
[MoveRMwr] -> [^16].
[MoveRdM64r] -> [^self literalLoadInstructionBytes + 4].
+ [MoveMbrR] -> [^4].
+ [MoveRMbr] -> [^4].
- [MoveMbrR] -> [^16].
- [MoveRMbr] -> [^16].
[MoveM16rR] -> [^4].
+ [MoveRM16r] -> [^4].
[MoveM64rRd] -> [^self literalLoadInstructionBytes + 4].
[MoveMwrR] -> [^16].
[MoveXbrRR] -> [^8].
[MoveRXbrR] -> [^8].
[MoveXwrRR] -> [^12].
[MoveRXwrR] -> [^12].
[PopR] -> [^8].
[PushR] -> [^8].
[PushCw] -> [^16].
[PushCq] -> [^16].
[PrefetchAw] -> [^12].
"Conversion"
[ConvertRRd] -> [^8].
}.
^0 "to keep C compiler quiet"
!
Item was added:
+ ----- Method: CogMIPSELCompiler>>concretizeMoveRM16r (in category 'generate machine code - concretize') -----
+ concretizeMoveRM16r
+ <var: #offset type: #sqInt>
+ | srcReg offset destReg |
+ srcReg := operands at: 0.
+ offset := operands at: 1.
+ destReg := operands at: 2.
+ self machineCodeAt: 0 put: (self shR: srcReg base: destReg offset: offset).
+ ^machineCodeSize := 4!
Item was added:
+ ----- Method: CogMIPSELCompiler>>concretizeMoveRMbr (in category 'generate machine code - concretize') -----
+ concretizeMoveRMbr
+ <var: #offset type: #sqInt>
+ | srcReg offset destReg |
+ srcReg := operands at: 0.
+ offset := operands at: 1.
+ destReg := operands at: 2.
+ self machineCodeAt: 0 put: (self sbR: srcReg base: destReg offset: offset).
+ ^machineCodeSize := 4!
Item was changed:
----- Method: CogMIPSELCompiler>>dispatchConcretize (in category 'generate machine code') -----
dispatchConcretize
"Attempt to generate concrete machine code for the instruction at address.
This is the inner dispatch of concretizeAt: actualAddress which exists only
to get around the branch size limits in the SqueakV3 (blue book derived)
bytecode set."
<returnTypeC: #void>
opcode caseOf: {
[BrEqualRR] -> [^self concretizeBrEqualRR].
[BrNotEqualRR] -> [^self concretizeBrNotEqualRR].
[BrUnsignedLessRR] -> [^self concretizeBrUnsignedLessRR].
[BrUnsignedLessEqualRR] -> [^self concretizeBrUnsignedLessEqualRR].
[BrUnsignedGreaterRR] -> [^self concretizeBrUnsignedGreaterRR].
[BrUnsignedGreaterEqualRR] -> [^self concretizeBrUnsignedGreaterEqualRR].
[BrSignedLessRR] -> [^self concretizeBrSignedLessRR].
[BrSignedLessEqualRR] -> [^self concretizeBrSignedLessEqualRR].
[BrSignedGreaterRR] -> [^self concretizeBrSignedGreaterRR].
[BrSignedGreaterEqualRR] -> [^self concretizeBrSignedGreaterEqualRR].
[BrLongEqualRR] -> [^self concretizeBrLongEqualRR].
[BrLongNotEqualRR] -> [^self concretizeBrLongNotEqualRR].
[MulRR] -> [^self concretizeUnimplemented].
[DivRR] -> [^self concretizeDivRR].
[MoveLowR] -> [^self concretizeMoveLowR].
[MoveHighR] -> [^self concretizeMoveHighR].
"Noops & Pseudo Ops"
[Label] -> [^self concretizeLabel].
[AlignmentNops] -> [^self concretizeAlignmentNops].
[Fill32] -> [^self concretizeFill32].
[Nop] -> [^self concretizeNop].
"Control"
[Call] -> [^self concretizeCall]. "call code within code space"
[CallFull] -> [^self concretizeCallFull]. "call code anywhere in address space"
[JumpR] -> [^self concretizeJumpR].
[JumpFull] -> [^self concretizeJumpFull]."jump within address space"
[JumpLong] -> [^self concretizeJumpLong]."jumps witihn code space"
[JumpLongZero] -> [^self concretizeJumpLongZero].
[JumpLongNonZero] -> [^self concretizeJumpLongNonZero].
[Jump] -> [^self concretizeJump].
[JumpZero] -> [^self concretizeJumpZero].
[JumpNonZero] -> [^self concretizeJumpNonZero].
[JumpNegative] -> [^self concretizeUnimplemented].
[JumpNonNegative] -> [^self concretizeUnimplemented].
[JumpOverflow] -> [^self concretizeJumpOverflow].
[JumpNoOverflow] -> [^self concretizeJumpNoOverflow].
[JumpCarry] -> [^self concretizeUnimplemented].
[JumpNoCarry] -> [^self concretizeUnimplemented].
[JumpLess] -> [^self concretizeJumpSignedLessThan].
[JumpGreaterOrEqual] -> [^self concretizeJumpSignedGreaterEqual].
[JumpGreater] -> [^self concretizeJumpSignedGreaterThan].
[JumpLessOrEqual] -> [^self concretizeJumpSignedLessEqual].
[JumpBelow] -> [^self concretizeJumpUnsignedLessThan].
[JumpAboveOrEqual] -> [^self concretizeJumpUnsignedGreaterEqual].
[JumpAbove] -> [^self concretizeJumpUnsignedGreaterThan].
[JumpBelowOrEqual] -> [^self concretizeJumpUnsignedLessEqual].
[JumpFPEqual] -> [^self concretizeUnimplemented].
[JumpFPNotEqual] -> [^self concretizeUnimplemented].
[JumpFPLess] -> [^self concretizeUnimplemented].
[JumpFPGreaterOrEqual] -> [^self concretizeUnimplemented].
[JumpFPGreater] -> [^self concretizeUnimplemented].
[JumpFPLessOrEqual] -> [^self concretizeUnimplemented].
[JumpFPOrdered] -> [^self concretizeUnimplemented].
[JumpFPUnordered] -> [^self concretizeUnimplemented].
[RetN] -> [^self concretizeRetN].
[Stop] -> [^self concretizeStop].
"Arithmetic"
[AddCqR] -> [^self concretizeAddCqR].
[AndCqR] -> [^self concretizeAndCqR].
[AndCqRR] -> [^self concretizeAndCqRR].
[CmpCqR] -> [^self concretizeCmpCqR].
[OrCqR] -> [^self concretizeOrCqR].
[SubCqR] -> [^self concretizeSubCqR].
[TstCqR] -> [^self concretizeTstCqR].
[XorCqR] -> [^self concretizeUnimplemented].
[AddCwR] -> [^self concretizeAddCwR].
[AndCwR] -> [^self concretizeAndCwR].
[CmpCwR] -> [^self concretizeCmpCwR].
[OrCwR] -> [^self concretizeOrCwR].
[SubCwR] -> [^self concretizeSubCwR].
[XorCwR] -> [^self concretizeXorCwR].
[AddRR] -> [^self concretizeAddRR].
[AndRR] -> [^self concretizeAndRR].
[CmpRR] -> [^self concretizeCmpRR].
[OrRR] -> [^self concretizeOrRR].
[SubRR] -> [^self concretizeSubRR].
[XorRR] -> [^self concretizeXorRR].
[AddRdRd] -> [^self concretizeUnimplemented].
[CmpRdRd] -> [^self concretizeUnimplemented].
[DivRdRd] -> [^self concretizeUnimplemented].
[MulRdRd] -> [^self concretizeUnimplemented].
[SubRdRd] -> [^self concretizeUnimplemented].
[SqrtRd] -> [^self concretizeUnimplemented].
[NegateR] -> [^self concretizeNegateR].
[LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR].
[ArithmeticShiftRightCqR] -> [^self concretizeArithmeticShiftRightCqR].
[LogicalShiftRightCqR] -> [^self concretizeLogicalShiftRightCqR].
[LogicalShiftLeftCqR] -> [^self concretizeLogicalShiftLeftCqR].
[ArithmeticShiftRightRR] -> [^self concretizeArithmeticShiftRightRR].
[LogicalShiftLeftRR] -> [^self concretizeLogicalShiftLeftRR].
[LogicalShiftRightRR] -> [^self concretizeLogicalShiftRightRR].
"Data Movement"
[MoveCqR] -> [^self concretizeMoveCqR].
[MoveCwR] -> [^self concretizeMoveCwR].
[MoveRR] -> [^self concretizeMoveRR].
[MoveAwR] -> [^self concretizeMoveAwR].
[MoveRAw] -> [^self concretizeMoveRAw].
[MoveAbR] -> [^self concretizeMoveAbR].
[MoveRAb] -> [^self concretizeMoveRAb].
[MoveMbrR] -> [^self concretizeMoveMbrR].
[MoveRMbr] -> [^self concretizeUnimplemented].
[MoveM16rR] -> [^self concretizeMoveM16rR].
+ [MoveRM16r] -> [^self concretizeMoveRM16r].
[MoveM64rRd] -> [^self concretizeUnimplemented].
[MoveMwrR] -> [^self concretizeMoveMwrR].
[MoveXbrRR] -> [^self concretizeMoveXbrRR].
[MoveRXbrR] -> [^self concretizeMoveRXbrR].
[MoveXwrRR] -> [^self concretizeMoveXwrRR].
[MoveRXwrR] -> [^self concretizeMoveRXwrR].
[MoveRMwr] -> [^self concretizeMoveRMwr].
[MoveRdM64r] -> [^self concretizeUnimplemented].
[PopR] -> [^self concretizePopR].
[PushR] -> [^self concretizePushR].
[PushCq] -> [^self concretizePushCq].
[PushCw] -> [^self concretizePushCw].
[PrefetchAw] -> [^self concretizePrefetchAw].
[AddCheckOverflowCqR] -> [^self concretizeAddCheckOverflowCqR].
[AddCheckOverflowRR] -> [^self concretizeAddCheckOverflowRR].
[SubCheckOverflowCqR] -> [^self concretizeSubCheckOverflowCqR].
[SubCheckOverflowRR] -> [^self concretizeSubCheckOverflowRR].
[MulCheckOverflowRR] -> [^self concretizeMulCheckOverflowRR].
"Conversion"
[ConvertRRd] -> [^self concretizeUnimplemented]}!
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