[Vm-dev] [OpenSmalltalk/opensmalltalk-vm] c13080: CogVM source as per VMMaker.oscog-eem.2160
GitHub
noreply at github.com
Fri Mar 17 01:10:50 UTC 2017
Branch: refs/heads/Cog
Home: https://github.com/OpenSmalltalk/opensmalltalk-vm
Commit: c13080889f499605bd598aa5f770a27913f66bed
https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/c13080889f499605bd598aa5f770a27913f66bed
Author: Eliot Miranda <eliot.miranda at gmail.com>
Date: 2017-03-16 (Thu, 16 Mar 2017)
Changed paths:
M nsspur64src/vm/cogit.h
M nsspur64src/vm/cogitX64.c
M nsspur64src/vm/cointerp.c
M nsspur64src/vm/cointerp.h
M nsspur64src/vm/gcc3x-cointerp.c
M nsspursrc/vm/cogit.h
M nsspursrc/vm/cogitARMv5.c
M nsspursrc/vm/cogitIA32.c
M nsspursrc/vm/cogitMIPSEL.c
M nsspursrc/vm/cointerp.c
M nsspursrc/vm/cointerp.h
M nsspursrc/vm/gcc3x-cointerp.c
M nsspurstack64src/vm/gcc3x-interp.c
M nsspurstack64src/vm/interp.c
M nsspurstacksrc/vm/gcc3x-interp.c
M nsspurstacksrc/vm/interp.c
M spur64src/vm/cogit.h
M spur64src/vm/cogitX64.c
M spur64src/vm/cointerp.c
M spur64src/vm/cointerp.h
M spur64src/vm/gcc3x-cointerp.c
M spurlowcode64src/vm/cogit.h
M spurlowcode64src/vm/cogitX64.c
M spurlowcode64src/vm/cointerp.c
M spurlowcode64src/vm/cointerp.h
M spurlowcode64src/vm/gcc3x-cointerp.c
M spurlowcodesrc/vm/cogit.h
M spurlowcodesrc/vm/cogitARMv5.c
M spurlowcodesrc/vm/cogitIA32.c
M spurlowcodesrc/vm/cogitMIPSEL.c
M spurlowcodesrc/vm/cointerp.c
M spurlowcodesrc/vm/cointerp.h
M spurlowcodesrc/vm/gcc3x-cointerp.c
M spurlowcodestack64src/vm/gcc3x-interp.c
M spurlowcodestack64src/vm/interp.c
M spurlowcodestacksrc/vm/gcc3x-interp.c
M spurlowcodestacksrc/vm/interp.c
M spursista64src/vm/cogit.h
M spursista64src/vm/cogitX64.c
M spursista64src/vm/cointerp.c
M spursista64src/vm/cointerp.h
M spursista64src/vm/gcc3x-cointerp.c
M spursistasrc/vm/cogit.h
M spursistasrc/vm/cogitARMv5.c
M spursistasrc/vm/cogitIA32.c
M spursistasrc/vm/cogitMIPSEL.c
M spursistasrc/vm/cointerp.c
M spursistasrc/vm/cointerp.h
M spursistasrc/vm/gcc3x-cointerp.c
M spursrc/vm/cogit.h
M spursrc/vm/cogitARMv5.c
M spursrc/vm/cogitIA32.c
M spursrc/vm/cogitMIPSEL.c
M spursrc/vm/cointerp.c
M spursrc/vm/cointerp.h
M spursrc/vm/gcc3x-cointerp.c
M spurstack64src/vm/gcc3x-interp.c
M spurstack64src/vm/interp.c
M spurstacksrc/vm/gcc3x-interp.c
M spurstacksrc/vm/interp.c
M src/vm/cogit.h
M src/vm/cogitARMv5.c
M src/vm/cogitIA32.c
M src/vm/cogitMIPSEL.c
M src/vm/cointerp.c
M src/vm/cointerp.h
M src/vm/cointerpmt.c
M src/vm/cointerpmt.h
M src/vm/gcc3x-cointerp.c
M src/vm/gcc3x-cointerpmt.c
M stacksrc/vm/gcc3x-interp.c
M stacksrc/vm/interp.c
Log Message:
-----------
CogVM source as per VMMaker.oscog-eem.2160
StackInterpreter:
Simplify the generated code for primitiveVMParameter by using beRootIfOld:
instead of storePointer: for the bulk store into the zero args case. Make the
tenuringThreshold: setters use the same convention as other setters, answering
the primFailCode.
SpurCogit:
Fix regression in genNewHashTrampoline.
Fix the slip in creating the Spur ceNewHash trampoline, hence making the machine
code identityHash primitive non-failing. Add a different trampoline for Sista
inline prim identityHash that saves all registers.
Sista:
Provide a movable allocation threshold in the mehtod zone so that nore space can
be made available on a counter trip to avoid reclaiming the method zone and
there-by destroying send and branch data as Scorch kicks in. Allow the
threshold to be read and reset via vmParameterAt: 17. Put this in the
SistaMethodZOne subclass of CogMethodZone. Have the ceCounterTripped: routine
set the threshold to 1.0 from its default of 0.5. Double the size of the
default code zone in Sista VMs.
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