[Vm-dev] VM Maker: CogPools-ISAs-eem.10.mcz

commits at source.squeak.org commits at source.squeak.org
Sun Dec 29 20:58:42 UTC 2019


Eliot Miranda uploaded a new version of CogPools-ISAs to project VM Maker:
http://source.squeak.org/VMMaker/CogPools-ISAs-eem.10.mcz

==================== Summary ====================

Name: CogPools-ISAs-eem.10
Author: eem
Time: 29 December 2019, 12:58:41.246662 pm
UUID: eae597de-27f6-4682-91c2-40835b4c711c
Ancestors: CogPools-ISAs-eem.9

More accurate ARMv8 instructionIsAnyB:

=============== Diff against CogPools-ISAs-eem.9 ===============

Item was changed:
  ----- Method: ARMv8A64Opcodes class>>instructionIsAnyB: (in category 'testing') -----
  instructionIsAnyB: word
  	"C4.1	A64 instruction set encoding on page C4-252
  	 C4.1.3 Branches, Exception Generating and System instructions"
  	| op0_101_op1MSB |
  	op0_101_op1MSB := word bitShift: -25.
+ 	^op0_101_op1MSB = 2r0101010								"Conditional branch immediate"
+ 	or: [op0_101_op1MSB = 2r1101011							"Unconditional branch (register)"
+ 	or: [(op0_101_op1MSB bitAnd: 2r1111110) = 2r1001010		"Unconditional Branch (immediate)	BL"
- 	^op0_101_op1MSB = 2r0101010							"Conditional branch immediate"
- 	or: [op0_101_op1MSB = 2r1101011						"Unconditional branch (register)"
- 	or: [op0_101_op1MSB = 2r1001011						"Unconditional Branch (immediate)	BL"
  	or: [(op0_101_op1MSB bitAnd: 2r1111110) = 2r0001010]]]	"Unconditional branch (immediate) & Compare/Test and branch (immediate)"!



More information about the Vm-dev mailing list