[Vm-dev] VM Maker: VMMaker.oscog-eem.2695.mcz

[commits at source.squeak.org]

Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2695.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.2695
Author: eem
Time: 1 February 2020, 4:30:26.430441 pm
UUID: 259350c9-8ace-47c9-8ae2-94cd33693b45
Ancestors: VMMaker.oscog-eem.2694

...and fix some regressions in simulateLeafCallOf: for different processors and processor aliens.  All four main back ends nw correctly simulate again.

=============== Diff against VMMaker.oscog-eem.2694 ===============

Item was changed:
  ----- Method: Cogit>>simulateLeafCallOf: (in category 'simulation only') -----
  simulateLeafCallOf: someFunction
  	"Simulate execution of machine code that leaf-calls someFunction,
  	 answering the result returned by someFunction."
  	"CogProcessorAlienInspector openFor: coInterpreter"
  	<doNotGenerate>
+ 	| priorSP priorPC spOnEntry bogusRetPC |
- 	| priorSP priorPC spOnEntry |
  	self recordRegisters.
  	priorSP := processor sp.
  	priorPC := processor pc.
  	processor
  		setFramePointer: coInterpreter getCFramePointer stackPointer: coInterpreter getCStackPointer;
  		simulateLeafCallOf: someFunction
+ 		nextpc: (bogusRetPC := 16rBADF00D5 roundTo: backEnd codeGranularity)
- 		nextpc: 16rBADF00D5
  		memory: coInterpreter memory.
  	spOnEntry := processor sp.
  	self recordInstruction: {'(simulated call of '. someFunction. ')'}.
  	[processor pc between: 0 and: methodZone zoneEnd] whileTrue:
  		[[singleStep
  			ifTrue: [self recordProcessing.
  					self maybeBreakAt: processor pc.
  					processor
  						singleStepIn: coInterpreter memory
  						minimumAddress: guardPageSize
  						readOnlyBelow: methodZone zoneEnd]
  			ifFalse: [processor
  						runInMemory: coInterpreter memory
  						minimumAddress: guardPageSize
  						readOnlyBelow: methodZone zoneEnd]]
  			on: ProcessorSimulationTrap, Error
  			do: [:ex| | retpc |
+ 				processor pc = bogusRetPC ifTrue:
+ 					[self recordInstruction: {'(simulated (real) return to '. processor pc. ')'}.
- 				processor pc = 16rBADF00D5 ifTrue:
- 					[retpc := processor leafRetpcIn: coInterpreter memory.
- 					 self assert: retpc = 16rBADF00D5.
- 					 self recordInstruction: {'(simulated (real) return to '. retpc. ')'}.
  					 ^processor cResultRegister].
  				ex class == ProcessorSimulationTrap ifTrue:
  					[ex type == #read ifTrue:
  						[self handleReadSimulationTrap: ex. ex resume: processor].
  					 ex type == #write ifTrue:
+ 		 				[self handleWriteSimulationTrap: ex. ex resume: processor].
+ 					 ex type == #return ifTrue:
+ 						[retpc := processor leafRetpcIn: coInterpreter memory.
+ 						 self assert: retpc = bogusRetPC.
+ 						 processor simulateLeafReturnIn: coInterpreter memory.
+ 						 self recordInstruction: {'(simulated return to '. retpc. ')'}.
+ 						 ^processor cResultRegister]].
- 		 				[self handleWriteSimulationTrap: ex. ex resume: processor]].
  				ex pass]].
+ 	processor pc = bogusRetPC ifTrue:
- 	processor pc = 16rBADF00D5 ifTrue:
  		[self recordInstruction: {'(simulated (real) return to '. processor pc. ')'}].
  	^processor cResultRegister!