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[Henrik Sperre Johansen]

Mmmhm, reading “Immediate operands” on http://www.peter-cockerell.net/aalp/html/ch-3.html <http://www.peter-cockerell.net/aalp/html/ch-3.html>, it is kind of elegant.
I like that a sufficiently smart assembler (like, Cog? ;) ), can translate a pseudo-assembly logical op with *any* immediate operand into 1 - 4(8, for 64 bit) machine code instructions by combining different positions.

“All ops are 32 bits! … but some times you need 1, some times you need 8"

Cheers,
Henry 

> On 10 Jan 2020, at 09:28, Eliot Miranda <eliot.miranda at gmail.com> wrote:
> 
> Thanks, Henry!
> 
> On Fri, Dec 6, 2019 at 1:53 AM Henrik Sperre Johansen <henrik.s.johansen at veloxit.no <mailto:henrik.s.johansen at veloxit.no>> wrote:
>  
> commits-2 wrote
> > ARMv8 has an amazingly exotic scheme for encoding bitfields as immediates
> > in logical operations.  Copy LLVM's encoder.  So far this is unverified
> > because I cannot make sense of 
> >       immN:NOT(imms)
> > in
> >               len = HighestSetBit(immN:NOT(imms));
> > in DecodeBitMasks on page J1-7389 of the Arm ARM.
> > If you can make sense of this either consider fully implementing
> > CogARMv8Compiler>>decodeBitMasksN:imms:immr: or explaining to me what is
> > meant by "immN:NOT(imms)" (via email to OpenSMalltalk-VM ?).
> > 
> > AdvThanksance.
> 
> Is line 91 of
> https://github.com/NationalSecurityAgency/ghidra/blob/master/Ghidra/Processors/AARCH64/src/main/java/DecodeBitMasks.java <https://github.com/NationalSecurityAgency/ghidra/blob/master/Ghidra/Processors/AARCH64/src/main/java/DecodeBitMasks.java>
> of any help?
> 
> Iow, 
> : -> concatenate bits
> NOT -> ... not
> 
> In the end no.  I found other more concise code to study.  But thanks fir the heads up.  Clever, though, isn't it?  I think I would never have come up with a similar scheme myself.
> 
> _,,,^..^,,,_
> best, Eliot

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