[Vm-dev] VM Maker: VMMaker.oscog-eem.2602.mcz

Henrik Sperre Johansen henrik.s.johansen at veloxit.no
Fri Jan 10 22:05:10 UTC 2020


Orrr, I guess that was the immediate format for arithmetic ops.

What's described here:
https://dinfuehr.github.io/blog/encoding-of-immediate-values-on-aarch64/ 
is indeed quite a bit more clever.

Covering all 32/64 bit 0+1* patterns, with rotation, in and understandable
13 bit format seems the most clever to me.
 I have a harder time seeing a use for the smaller element sizes, but I
guess I'm just narrow-minded :)
 (... or I'm missing something, again) 

Cheers,
Henry


Henrik Sperre Johansen wrote
> Mmmhm, reading “Immediate operands” on
> http://www.peter-cockerell.net/aalp/html/ch-3.html
> <http://www.peter-cockerell.net/aalp/html/ch-3.html>, it is kind of
> elegant.
> I like that a sufficiently smart assembler (like, Cog? ;) ), can translate
> a pseudo-assembly logical op with *any* immediate operand into 1 - 4(8,
> for 64 bit) machine code instructions by combining different positions.
> 
> “All ops are 32 bits! … but some times you need 1, some times you need 8"
> 
> Cheers,
> Henry 
> 
>> On 10 Jan 2020, at 09:28, Eliot Miranda <

> eliot.miranda@

> > wrote:
>> 
>> Thanks, Henry!
>> 
>> On Fri, Dec 6, 2019 at 1:53 AM Henrik Sperre Johansen <

> henrik.s.johansen@

>  <mailto:

> henrik.s.johansen@

> >> wrote:
>>  
>> commits-2 wrote
>> > ARMv8 has an amazingly exotic scheme for encoding bitfields as
>> immediates
>> > in logical operations.  Copy LLVM's encoder.  So far this is unverified
>> > because I cannot make sense of 
>> >       immN:NOT(imms)
>> > in
>> >               len = HighestSetBit(immN:NOT(imms));
>> > in DecodeBitMasks on page J1-7389 of the Arm ARM.
>> > If you can make sense of this either consider fully implementing
>> > CogARMv8Compiler>>decodeBitMasksN:imms:immr: or explaining to me what
>> is
>> > meant by "immN:NOT(imms)" (via email to OpenSMalltalk-VM ?).
>> > 
>> > AdvThanksance.
>> 
>> Is line 91 of
>> https://github.com/NationalSecurityAgency/ghidra/blob/master/Ghidra/Processors/AARCH64/src/main/java/DecodeBitMasks.java
>> <https://github.com/NationalSecurityAgency/ghidra/blob/master/Ghidra/Processors/AARCH64/src/main/java/DecodeBitMasks.java>
>> of any help?
>> 
>> Iow, 
>> : -> concatenate bits
>> NOT -> ... not
>> 
>> In the end no.  I found other more concise code to study.  But thanks fir
>> the heads up.  Clever, though, isn't it?  I think I would never have come
>> up with a similar scheme myself.
>> 
>> _,,,^..^,,,_
>> best, Eliot





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