[Vm-dev] VM Maker: VMMaker.oscog-eem.2671.mcz

commits at source.squeak.org commits at source.squeak.org
Thu Jan 23 07:10:57 UTC 2020

Eliot Miranda uploaded a new version of VMMaker to project VM Maker:

==================== Summary ====================

Name: VMMaker.oscog-eem.2671
Author: eem
Time: 22 January 2020, 11:10:41.31262 pm
UUID: 4d0f215a-ffe0-4741-b21d-e12ff3aeb658
Ancestors: VMMaker.oscog-eem.2670

Fix a slip in simulateCeFlushICacheFrom:to:.
Check for breakpoints in simulateLeafCallOf:

=============== Diff against VMMaker.oscog-eem.2670 ===============

Item was changed:
  ----- Method: Cogit>>simulateCeFlushICacheFrom:to: (in category 'simulation only') -----
  simulateCeFlushICacheFrom: start to: finish
+ 	processor abiMarshallArg0: start arg1: finish.
- 	processor abiMarshallArg0: start arg1: start.
  	self simulateLeafCallOf: ceFlushICache!

Item was changed:
  ----- Method: Cogit>>simulateLeafCallOf: (in category 'simulation only') -----
  simulateLeafCallOf: someFunction
  	"Simulate execution of machine code that leaf-calls someFunction,
  	 answering the result returned by someFunction."
  	| spOnEntry |
  	self recordRegisters.
  		simulateLeafCallOf: someFunction
  		nextpc: 16rBADF00D5
  		memory: coInterpreter memory.
  	spOnEntry := processor sp.
  	self recordInstruction: {'(simulated call of '. someFunction. ')'}.
  	[[processor pc between: 0 and: methodZone zoneEnd] whileTrue:
  			ifTrue: [self recordProcessing.
+ 					self maybeBreakAt: processor pc.
  						singleStepIn: coInterpreter memory
  						minimumAddress: guardPageSize
  						readOnlyBelow: methodZone zoneEnd]
  			ifFalse: [processor
  						runInMemory: coInterpreter memory
  						minimumAddress: guardPageSize
  						readOnlyBelow: methodZone zoneEnd]]]
  		on: ProcessorSimulationTrap
  		do: [:ex| | retpc |
  			"If the ip is out of bounds the return has already occurred."
  			((processor pc between: 0 and: methodZone zoneEnd)
  			 and: [processor sp <= spOnEntry]) ifTrue:
  				[retpc := processor leafRetpcIn: coInterpreter memory.
  				 self assert: retpc = 16rBADF00D5.
  				 self recordInstruction: {'(simulated return to '. retpc. ')'.
  				 processor simulateLeafReturnIn: coInterpreter memory}.
  				 self recordRegisters]].
  	^processor cResultRegister!

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