[Vm-dev] VM Maker: Cog-eem.421.mcz

commits at source.squeak.org commits at source.squeak.org
Thu Oct 29 06:53:45 UTC 2020


Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.421.mcz

==================== Summary ====================

Name: Cog-eem.421
Author: eem
Time: 28 October 2020, 11:53:43.385785 pm
UUID: 0ace52a2-3ab3-4b9f-bdc5-890dba71fbaa
Ancestors: Cog-eem.420

Modify dispatch of ProcessorSimulationTraps to doiuble dispatching (ProcessorSimulationTrap>>applyTo:).  Extent the set of traps with CompareAndSwapSimulationTrap.  Support MultiProcessor in goig with the flow by having CompareAndSwapSimulationTrap resume always with teh nonVirtualProcessor.

=============== Diff against Cog-eem.420 ===============

Item was added:
+ ProcessorSimulationTrap subclass: #CompareAndSwapSimulationTrap
+ 	instanceVariableNames: 'expectedValue storedValue'
+ 	classVariableNames: ''
+ 	poolDictionaries: ''
+ 	category: 'Cog-Processors'!

Item was added:
+ ----- Method: CompareAndSwapSimulationTrap>>applyTo: (in category 'double dispatching') -----
+ applyTo: aCogit
+ 	^aCogit handleCompareAndSwapSimulationTrap: self!

Item was added:
+ ----- Method: CompareAndSwapSimulationTrap>>expectedValue (in category 'accessing') -----
+ expectedValue
+ 
+ 	^expectedValue!

Item was added:
+ ----- Method: CompareAndSwapSimulationTrap>>expectedValue: (in category 'accessing') -----
+ expectedValue: anObject
+ 
+ 	expectedValue := anObject!

Item was added:
+ ----- Method: CompareAndSwapSimulationTrap>>storedValue (in category 'accessing') -----
+ storedValue
+ 
+ 	^storedValue!

Item was added:
+ ----- Method: CompareAndSwapSimulationTrap>>storedValue: (in category 'accessing') -----
+ storedValue: anObject
+ 
+ 	storedValue := anObject!

Item was added:
+ ----- Method: Exception>>isProcessorSimulationTrap (in category '*Cog-Processors-testing') -----
+ isProcessorSimulationTrap
+ 	^false!

Item was changed:
  ----- Method: GdbARMv8AlienTests>>testNfib1 (in category 'tests') -----
  testNfib1
  	"self new testNfib1"
  	self should: [self runNFib: 1 disassemble: false printRegisters: false]
  		raise: Error
  		withExceptionDo: 
  			[:err|
+ 			 self assert: err isProcessorSimulationTrap.
- 			 self assert: err class = ProcessorSimulationTrap.
  			 self assert: #return = err type.
  			 self assert: 16r1000 equals: err address].
  	self deny: (self processor pc between: 0 and: self nfib size).
  	self assert: self processor r0 = 1 benchFib!

Item was changed:
  ----- Method: MultiProcessor>>doesNotUnderstand: (in category 'message forwarding') -----
  doesNotUnderstand: aMessage
  	"Forward a message to the actual processor, managing a thread-switch if necessary.
  	 Catch ProcessorSimulationTraps and raise them outside of the critical section to
  	 avoid deadlock when reentering the VM from a trap and switching threads in the run-time."
  	| selector result trap contextInCritical |
  	selector := aMessage selector.
  	(guardedProcessorProtocol includes: selector) ifFalse:
  		[^(unguardedProcessorProtocol includes: selector)
  			ifTrue: [processor perform: selector withArguments: aMessage arguments]
  			ifFalse: [super doesNotUnderstand: aMessage]].
  	result := [mutex critical:
  				[contextInCritical := thisContext.
  				 owner ~~ mutex owningProcess ifTrue:
  					[owner ifNotNil:
  						[registerState at: owner put: processor registerState].
  					 (registerState at: (owner := mutex owningProcess) ifAbsent: nil)
  						ifNil: [coInterpreter initializeProcessorForThreadIndex: (threadIndex := threadIndex + 1)]
  						ifNotNil: [:newState| processor setRegisterState: newState]].
  				 processor perform: selector withArguments: aMessage arguments]]
  					on: ProcessorSimulationTrap, Error, AssertionFailure
  					do: [:ex|
+ 						ex isProcessorSimulationTrap ifFalse:
- 						ex class == ProcessorSimulationTrap ifFalse:
  							[ex pass].
  						"Alas things are not so simple with ARMv8 ldp/stp...
  						 The comments in these two methods explain..."
  						(self isAboutToReturn: ex signalerContext) ifFalse:
  							[self saveStackFor: ex signalerContext
  								above: contextInCritical
  								homeContext: thisContext home].
  						trap := ex].
  	^trap
  		ifNil: [result]
  		ifNotNil: [trap signal ifNotNil:
  					[:resultOfSignal|
  					resultOfSignal == self
  						ifTrue: [processor]
  						ifFalse: [resultOfSignal]]]!

Item was added:
+ ----- Method: ProcessorSimulationTrap>>applyTo: (in category 'double dispatching') -----
+ applyTo: aCogit
+ 	type == #read ifTrue:
+ 		[^aCogit handleReadSimulationTrap: self].
+ 	(type == #call or: [type == #jump]) ifTrue:
+ 		[^aCogit handleCallOrJumpSimulationTrap: self].
+ 	type == #write ifTrue:
+ 		[^aCogit handleWriteSimulationTrap: self].
+ 	self assert: type == #return.
+ 	^aCogit handleReturnSimulationTrap: self!

Item was added:
+ ----- Method: ProcessorSimulationTrap>>isProcessorSimulationTrap (in category 'testing') -----
+ isProcessorSimulationTrap
+ 	^true!

Item was added:
+ ----- Method: ProcessorSimulationTrap>>resume: (in category 'handling') -----
+ resume: aProcessorSimulator
+ 	^super resume: aProcessorSimulator nonVirtualProcessor!



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