[Vm-dev] VM Maker: Cog-eem.410.mcz

[commits at source.squeak.org]

Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.410.mcz

==================== Summary ====================

Name: Cog-eem.410
Author: eem
Time: 15 September 2020, 1:41:52.361982 pm
UUID: 74aea94d-a83d-4b8a-a3e7-9744bddb8476
Ancestors: Cog-eem.409

Get the MIPS simulator not to inctement the pc when faulting.  Fix a typo.

=============== Diff against Cog-eem.409 ===============

Item was changed:
  ----- Method: MIPSELSimulator>>executeFault: (in category 'memory') -----
  executeFault: address
  	| jumpInstruction type |
  	self assert: inDelaySlot not.
+ 	fault := #call. "default"
  	jumpInstruction := MIPSInstruction new value: (self fetchInstruction: jumpingPC).
+ 	jumpInstruction opcode = J
+ 		ifTrue: [type := #jump]
+ 		ifFalse:
+ 			[jumpInstruction opcode = SPECIAL ifTrue: 
+ 				[jumpInstruction function = JR ifTrue:
+ 					[fault := jumpInstruction rs = RA
+ 								ifTrue: [#return]
+ 								ifFalse: [#jump]]]].
- 	jumpInstruction opcode = J ifTrue: [type := #jump].
- 	jumpInstruction opcode = JAL ifTrue: [type := #call].
- 	jumpInstruction opcode = SPECIAL ifTrue: 
- 		[jumpInstruction function = JR ifTrue:
- 			[jumpInstruction rs = RA
- 				ifTrue: [type := #return]
- 				ifFalse: [type := #jump]].
- 		jumpInstruction function = JALR ifTrue:
- 			[type := #call]].
- 	self assert: type ~~ nil.
  
  	^(ProcessorSimulationTrap
+ 			pc: jumpingPC
+ 			nextpc: address
- 			pc: nil
- 			nextpc: nil
  			address: address
+ 			type: fault
- 			type: type
  			accessor: nil)
  		signal!

Item was changed:
  ----- Method: MIPSELSimulator>>fetchInstruction: (in category 'memory') -----
  fetchInstruction: address
+ 	address < executableBase ifTrue: [self executeFault: address].
+ 	address > executableLimit ifTrue: [self executeFault: address].
- 	address < exectuableBase ifTrue: [self executeFault: address].
- 	address > exectuableLimit ifTrue: [self executeFault: address].
  	(address bitAnd: 3) = 0 ifFalse: [self error: 'Unaligned read'].
  	^memory unsignedLongAt: address + 1 bigEndian: false!

Item was changed:
  ----- Method: MIPSELSimulator>>readFault: (in category 'memory') -----
  readFault: address
  	| destReg |
  	self assert: inDelaySlot not. "Or we have to store nextPC somewhere."
  	destReg := (MIPSInstruction new value: (self fetchInstruction: pc)) rt.
  	
  	^(ProcessorSimulationTrap
  			pc: pc
  			nextpc: pc + 4
  			address: address
+ 			type: (fault := #read)
- 			type: #read
  			accessor: (self setterForRegister: destReg))
  		signal
  !

Item was changed:
  ----- Method: MIPSELSimulator>>writeFault: (in category 'memory') -----
  writeFault: address
  	| srcReg |
  	self assert: inDelaySlot not. "Or we have to store nextPC somewhere."
  	srcReg := (MIPSInstruction new value: (self fetchInstruction: pc)) rt.
  	
  	^(ProcessorSimulationTrap
  			pc: pc
  			nextpc: pc + 4
  			address: address
+ 			type: (fault := #write)
- 			type: #write
  			accessor: (self getterForRegister: srcReg))
  		signal
  !

Item was changed:
  Object subclass: #MIPSSimulator
+ 	instanceVariableNames: 'memory registers pc instructionCount inDelaySlot readableBase writableBase readableLimit writableLimit jumpingPC hi lo executableBase executableLimit fault'
- 	instanceVariableNames: 'memory registers pc instructionCount inDelaySlot readableBase writableBase exectuableBase readableLimit writableLimit exectuableLimit jumpingPC hi lo'
  	classVariableNames: 'EndSimulationPC'
  	poolDictionaries: 'MIPSConstants'
  	category: 'Cog-Processors'!
  
  !MIPSSimulator commentStamp: 'rmacnak 11/11/2015 20:33:00' prior: 0!
  Simulator for 32-bit MIPS, without implementation of memory access.!

Item was changed:
  ----- Method: MIPSSimulator>>attemptJumpTo:type: (in category 'instructions - control') -----
  attemptJumpTo: nextPC type: trapType
+ 	(nextPC between: readableBase and: executableLimit) ifFalse:
- 	(nextPC between: readableBase and: exectuableLimit) ifFalse:
  		[^(ProcessorSimulationTrap
  				pc: pc
  				nextpc: pc + OneInstruction
  				address: nextPC
+ 				type: (fault := trapType))
- 				type: trapType)
  			signal].
  	pc := nextPC - OneInstruction "Account for general increment"!

Item was changed:
  ----- Method: MIPSSimulator>>initializeWithMemory: (in category 'as yet unclassified') -----
  initializeWithMemory: aByteArray
  	memory := aByteArray.
  	readableBase := 0.
  	writableBase := 0.
+ 	executableBase := 0.
- 	exectuableBase := 0.
  	readableLimit := memory size.
  	writableLimit := memory size.
+ 	executableLimit := memory size.!
- 	exectuableLimit := memory size.!

Item was changed:
  ----- Method: MIPSSimulator>>runInMemory:minimumAddress:readOnlyBelow: (in category 'processor api') -----
  runInMemory: aMemory minimumAddress: minimumAddress readOnlyBelow: minimumWritableAddress
  	"Note that minimumWritableAddress is both the minimum writeable address AND the maximum executable address"
  	memory := aMemory.
  	readableBase := minimumAddress.
  	writableBase := minimumWritableAddress.
+ 	executableBase := minimumAddress.
- 	exectuableBase := minimumAddress.
  	readableLimit := aMemory byteSize.
  	writableLimit := aMemory byteSize.
+ 	executableLimit := minimumWritableAddress.
- 	exectuableLimit := minimumWritableAddress.
  	self execute.!

Item was changed:
  ----- Method: MIPSSimulator>>step (in category 'as yet unclassified') -----
  step
  	"If the next instruction is a branch, its delay slot will also be executed."	
  	| instruction |
  	"Transcript print: instructionCount; nextPutAll: ' X '; nextPutAll: self currentInstruction; flush"
+ 	fault := nil.
  	instruction := MIPSInstruction new value: (self fetchInstruction: pc).
  	instruction decodeFor: self.
+ 	fault
+ 		ifNotNil: [fault := nil]
+ 		ifNil: [pc := pc + OneInstruction].
+ 	instructionCount := instructionCount + 1!
- 	pc := pc + OneInstruction.
- 	instructionCount := instructionCount + 1.!