[Vm-dev] CNTVCT, Counter-timer Virtual Count register on AArch32

Eliot Miranda eliot.miranda at gmail.com
Wed Aug 4 18:35:06 UTC 2021


Hi Ken, Hi Tim, Hi All,

    I see that ARM32 does indeed support a 64-bit performance counter.  See
G8.7.23

CNTVCT, Counter-timer Virtual Count register, p G8-6692 of the Armv8
Architecture Manual.  Apparently the assembler syntax for accessing this is

        MRRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm>

I would love to see this counter accessed in
platforms//unix/vm/sqUnixHeartbeat.c at about line 187.  I'm revisiting
primitive profiling in the JIT and expect I shall be accessing the counter
directly from machine code, but AndreasSystemProfiler also needs this
accessible from C, and ARM32 is the only one of our platforms not to
implement this yet.

_,,,^..^,,,_
best, Eliot
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