<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">2015-05-21 19:42 GMT+02:00 tim Rowledge <span dir="ltr"><<a href="mailto:tim@rowledge.org" target="_blank">tim@rowledge.org</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
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On 21-05-2015, at 10:19 AM, Eliot Miranda <<a href="mailto:eliot.miranda@gmail.com">eliot.miranda@gmail.com</a>> wrote:<br>
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>> Four 32-bit instructions loading 16-bit pieces, or one pc-relative load.<br>
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> So out-of-line = 12 bytes vs in-line = 16 bytes. For me, given that ARM has always supported out-of-line, and it should have good performance, I'd go for out-of-line. But it's performance could be much worse. Anyone have any numbers?<br>
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Also no absolute need to do 64bit oops with AArch64. It will be quite happy to do 32 bit oops. So 2x 16bit chunks would be fine for both that and v7. So far as I can work out all the operations can work in 32bit quantities, even rotations/shifts/compare.<br>
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And there is the hilarious concept of conditional comparisons - if the condition flags match a vector of condition flags, then do a compare of some sort and if that is true, set the flags as appropriate, otherwise set the flags to another vector. I’d love to see the logic that persuaded them to do that.<br>
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I swear I spotted a WTF instruction in there somewhere.<br>
<br></blockquote><div><br></div><div>Also a ROTFL<br>I think it just matches the conversion from SmallDouble to native double that Eliot naivly coded with many more instructions.<br><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
tim<br>
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tim Rowledge; <a href="mailto:tim@rowledge.org">tim@rowledge.org</a>; <a href="http://www.rowledge.org/tim" target="_blank">http://www.rowledge.org/tim</a><br>
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