<div dir="ltr">Ah. In Dart, we let compiled code use the ABI registers and spill them at runtime calls. Runtime calls are probably more frequent in Cog though, for the interpreter/jit and stack page transitions.<br><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Sep 24, 2015 at 9:11 PM, Eliot Miranda <span dir="ltr"><<a href="mailto:eliot.miranda@gmail.com" target="_blank">eliot.miranda@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> <br><div dir="auto"><div>Hi Ryan,</div><div><br></div><div> great question. The answer is here:</div><div><br></div><div><span style="background-color:rgba(255,255,255,0)">Name: VMMaker.oscog-eem.1466<br></span><span style="background-color:rgba(255,255,255,0)">...</span><span style="background-color:rgba(255,255,255,0)"><br>Revise upwards the max machine code size (for MoveRAw/AwR).<br>Implement some of the calling convention machinery.<br>Hence hit the first problem (in genPassReg:asArgument:). The Cogit assumes the C argument registers are distinct from the other abstract registers, but on x64 these are rdi, rsi, rdx & rcx, all of which we like to use (for Arg1Reg, Arg0Reg, ReceiverResultReg & ClassReg respectively). So it's probably time to revise the abstract to concrete register mapping to avoid the conflict. But I want to sleep on it first.</span><br><br><br>So I have yet to dedicate the needle four argument registers to calls from machine code into the runtime. Once this happens x64 should be down to 2 scratch registers :-(. I would love to be able to overlap the argument regs with allocate able registers but I've not written the necessary management code to flush allocated registers when runtime calls are made. I'm very open to suggestions here as losing those registers to runtime calls is a big hit.</div><div><br><span style="background-color:rgba(255,255,255,0)">_,,,^..^,,,_ (phone)</span></div><div><br>On Sep 24, 2015, at 7:34 PM, Ryan Macnak <<a href="mailto:rmacnak@gmail.com" target="_blank">rmacnak@gmail.com</a>> wrote:<br><br></div><blockquote type="cite"><div><span></span></div></blockquote><blockquote type="cite"><div><div dir="ltr">Why does ARM get so many fewer scratch registers than X64? I would expect them only to differ by two (LR and PC).<br><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Sep 23, 2015 at 11:08 AM, <span dir="ltr"><<a href="mailto:commits@source.squeak.org" target="_blank">commits@source.squeak.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:<br>
<a href="http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1465.mcz" rel="noreferrer" target="_blank">http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1465.mcz</a><br>
<br>
==================== Summary ====================<br>
<br>
Name: VMMaker.oscog-eem.1465<br>
Author: eem<br>
Time: 23 September 2015, 11:07:41.674 am<br>
UUID: abda63f2-d72f-486d-8163-d23e6a7ebaeb<br>
Ancestors: VMMaker.oscog-eem.1464<br>
<br>
Cogit:<br>
Extend the abstract register scheme to include 8 scratch registers. Allow ARMv6 use one, and x64 use 6. Hence nuke the ill-thought-out GPRegMax GPRegMin, and coincidentally, the unused MulCqR MulCwR MulRR.<br>
<br>
Add in-image compilation support for x64.</blockquote></div></div></div></div></blockquote></div></blockquote></div></div></div>