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                                        Hmm... does the OSVM do any spin-wait tricks to avoid context switches?<div class="mb_sig"></div>
                                        <div><br></div><div>Best,</div><div>Marcel</div><blockquote class="history_container" type="cite" style="border-left-style: solid;border-width: 1px;margin-top: 20px;margin-left: 0px;padding-left: 10px;min-width: 500px">
                        <p style="color: #AAAAAA; margin-top: 10px;">Am 13.06.2020 09:18:26 schrieb Bruce O'Neel <bruce.oneel@pckswarms.ch>:</p><div style="font-family:Arial,Helvetica,sans-serif"> 
<br>Skylake takes PAUSE about 10 times more seriously then did previous Intel CPUs.  Surprises happen..  
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<br>[https://aloiskraus.wordpress.com/2018/06/16/why-skylakex-cpus-are-sometimes-50-slower-how-intel-has-broken-existing-code/](https://aloiskraus.wordpress.com/2018/06/16/why-skylakex-cpus-are-sometimes-50-slower-how-intel-has-broken-existing-code/)  
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<br><div>Skylake takes PAUSE about 10 times more seriously then did previous Intel CPUs.  Surprises happen..<br></div><div><br></div><div><a href="https://aloiskraus.wordpress.com/2018/06/16/why-skylakex-cpus-are-sometimes-50-slower-how-intel-has-broken-existing-code/">https://aloiskraus.wordpress.com/2018/06/16/why-skylakex-cpus-are-sometimes-50-slower-how-intel-has-broken-existing-code/</a><br></div><div><br></div><div><br></div><div id="editorUserSignature" style="display:none;"><br></div></div></blockquote></div>