Hi Eliot,I will do it. In fact, I did not like the previous generated code because it has a bug. My only concern with that is when I need to allocate normal registers, and floating point registers. I guess that I would need to use more variations of allocate*RegistersForLowcodeInto: .
RonieBest regards,2017-02-26 4:42 GMT-03:00 Ben Coman <btc@openinworld.com>:On Sun, Feb 26, 2017 at 9:22 AM, Eliot Miranda <eliot.miranda@gmail.com> wrote:Hi Ronie, (Hi Clément),for a while now Clément and I have been unhappy about optStatus (CogSSOptStatus). Now that the RegisterAllocatingCogit is nearly working it's clear that a much nicer approach is to give CogSimStackEntry a liveRegister instance variable and have simSelf take the place of optStatus, so that what wereoptStatus isReceiverResultRegLiveoptStatus isReceiverResultRegLive: trueoptStatus isReceiverResultRegLive: falseare replaced bysimSelf liveRegister = ReceiverResultRegsimSelf liveRegister: ReceiverResultReg
simSelf liveRegister: NoRegTo this end can you rewrite the Lowcode code generator so that e.g. the followingEasier to compare for the casual viewer...cheers -bengenLowcodeAlloca32<option: #LowcodeVM> "Lowcode instruction generator"| size |(size := backEnd availableRegisterOrNoneFor: self liveRegisters) = NoReg ifTrue:[self ssAllocateRequiredReg:(size := optStatus isReceiverResultRegLiveifTrue: [Arg0Reg]ifFalse: [ReceiverResultReg])].size = ReceiverResultReg ifTrue:[ optStatus isReceiverResultRegLive: false ].self ssNativeTop nativePopToReg: size.self ssNativePop: 1.self MoveAw: coInterpreter nativeStackPointerAddress R: TempReg.self SubR: size R: TempReg.self AndCq: -16 R: TempReg.self MoveR: TempReg R: size.self MoveR: size Aw: coInterpreter nativeStackPointerAddress.self ssPushNativeRegister: size.^ 0reads something more likegenLowcodeAlloca32<option: #LowcodeVM> "Lowcode instruction generator"| size |self allocateOneRegisterForLowcodeInto: [:reg| size := reg] .self ssNativeTop nativePopToReg: size.self ssNativePop: 1.self MoveAw: coInterpreter nativeStackPointerAddress R: TempReg.self SubR: size R: TempReg.self AndCq: -16 R: TempReg.self MoveR: TempReg R: size.self MoveR: size Aw: coInterpreter nativeStackPointerAddress.self ssPushNativeRegister: size.^ 0etc? So there are allocateOneRegisterForLowcodeInto: through allocateThreeRegistersForLowco deInto:. This way it'll be much easier to make the above change which I'm making now. _,,,^..^,,,_best, Eliot