There's memory bandwidth and there's memory transaction t
Peter.Crowther at it-iq.com
Tue Feb 16 08:28:03 UTC 1999
> I'm really sorry about this... I liked the 68K more than the 8088.
Ever compared PDP-11 and M68K machine codes? *Very* close. The PDP-11 was
another machine with a very well-tuned, orthogonal instruction set; a
planned city, rather than the sprawling mess of lean-to shacks and muddy
streets that make up the modern x86 instruction set.
> From where I read it, an text file from the amiga describing the 68K, it
> meant that the cpu could initiate port accesses without having to wait
> completion, and so could go on executing stuff. I now think it has to do
> the amiga's chipset that controlled 25 dma channels.
[From someone who *still* has a 1st edition Amiga hardware reference manual
on his shelf at home... and the vintage 1984 A1000 to go with it...]
Correct. And it was blissfully easy to initiate DMA transfers, and the M68K
has a low interrupt latency so it's a cinch to program a relatively small
DMA and service the interrupt on completion. And the CPU was slower than
the memory, so the DMA chips could interleave with the processor and not
slow the CPU down [unless they had to; on an ultra-high-res mode the
processor got the line and frame flybacks, and everything else was display
> from Asmedit's clock cycle chart, flushing caches in a
> pentium processor needs 2000+ cycles, and context changes, mode changes
> so on are described as performance killers.
And people run 100-user Windows Terminal Server systems on quad PII's or
PPro's :-(. At least UNIX has a long timeslice so that the context change
overhead isn't that large.
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