> On Tue 25 Jan, Daniel Allan Joyce wrote:
> > 	Well, I think the webpad, and crusoe, and squeak will finally allow the
> > Dynabook to exist.
> Why all this brouhaha about a rather boring sounding processor? It's not like
> microcodable cpus are a new idea; the Alto was one for example. 

It's not clear to me that the "breakthrough" here is that the Crusoe is 
microcodable.  More likely, it's a combination of

	1) %75 reduction (depending on how you measure it) in transistor count
	   (which leads to smaller dies--%40-69% smaller than similar Intel
	   chips--enabling faster, lower power, and cheaper chips).
	2) Running the same application, the Intel chip runs ~2.2 _times_ hotter
	   than the comparable Crusoe chip.  This apparently enables a chip with
	   the performance of a PIII to run with no cooling whatsoever.
	3) From the CrusoeBenchmarkReport_1-18-00.pdf document, it looks like
	   the Crusoe offers almost identical performance when compared to Intel
	   chips (the only differing measurement was the benchmark for Office
	   use), but it offers that performance anywhere from 3-6 _times_ more
	   efficiently when energy consumption is included.
	4) The design of the Crusoe offers an i386 compatible chip that does not
	   use any Intel-patented technology--which should allow the chips to be
	   sold at a small fraction of the cost of other i386 compatible chips
	   which must factor in the cost of paying Intel patent royalties.

It also seems to me that since (for obvious reasons) Linux is the target OS 
for Crusoe research and development, there is a very high probability that 
users will be able to gain access to tools which allow them to fiddle with the 
Code Morphing Software.  Since that software is basically a compiler, this 
would allow specialized Code Morphing Software to be developed (and 
distributed) for use in embedded settings which can take advantage of known 
statistical structures in the i386 instructions being run.

Of course, not being a compiler guy I'm just stating what seems reasonable to 
me.  Not that I have any personal data to back it up :-)


> Clipper and look how well that did. Just because it has a changeable 'outside'
> instruction set does not mean it can do anything very magical. The most useful
> part of this kind of design is that you can at least (usually) store a bunch of
> your program in memory of cache performance and yet no get screwed by somebody
> else wrong idea of what bits of program need to be cached.
> It's like virtual memory; useful in a sort of general way, but almost always
> wrong in your precise circumstances.
> 
> There are plenty of currently available cpus that can make a Dynabook hardware
> a reality. Those ofyou that were at OOPSLA last year will have seen a pretty
> good beta version dynabook that craig and I worked on, using a StrongARM. The
> hardware is simply not a problem anymore. It's the _business_ that's the
> problem.

Right.  It's not like the Crusoe allows some kind of technology that was 
previously impossible.  But, the likelihood that a device that uses a Crusoe 
CPU will be able to run 3+ times longer than a similar device with an Intel 
chip is rather intriguing.

Tim-Have you looked at the benchmarks and specs for the Crusoes?  I'm curious 
as to your opinion of how the throughput/energy ratio of the Crusoes compares 
to that of the ARM processors (of which I know relatively little).

Cheers,
pete



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