[Q] stackbased/registerbased VM

Tim Rowledge tim at sumeru.stanford.edu
Sat Dec 13 17:38:28 UTC 2003


It's just a question of mapping. Stack based pseudo code is probably
simpler to generate but there is nothing to stop one mapping to
register (or indeed any other doohickey) based code later. VW has
possibly the most sophisticated translator around and uses the bytecode
stream as a flattened parsetree. There are a few extra helper bytecodes
(like 'top-of-loop) that do nothing in terms of the code but help the
translator do a better job.

I don't think we can really make much sense in talking about 'register
based vms' or 'stack based vms' in the same breath as 'stack based
bytecodes'. It seems a bit like arguing that a stack using high level
language cannot effectively run on a register centric cpu.

There's an extra level of distraction to the discussion as well;
caches, shadow registers and TCMs come into the picture and grossly
distort the practical effects of how one handles memory. I beleive that
recent x86s for example shadow the TOS in a sorta-cache that is
actually a register.

The nice part about the bytecodes-as-arsetree approach is that you can
translate to just about any kind of CPU. I dare say someone has written
a mathematical proof on the matter.

tim
--
Tim Rowledge, tim at sumeru.stanford.edu, http://sumeru.stanford.edu/tim
Backup not found: A)bort, R)etry, M)assive heart failure?



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