RISC42 [was: hardware for eToys]

Klaus D. Witzel klaus.witzel at cobss.com
Wed Nov 15 04:40:06 UTC 2006


Hi Jecel,

on Tue, 14 Nov 2006 20:49:09 +0100, you wrote:
...
>> Question to the VM guru: are there any opcodes in the instruction set of
>> ARM9 which allow a *fast* VM? A *small* VM is addressed by the thumb
>> thing, IIRC. But what about speed. And what VM technology, (direct)
>> threaded bytecode, or what does ARM9 support best.
>
...
> Though it lacks the register windows I like so much, the ARM has been my
> favorite RISC instruction set since I studied it 21 years ago. Only in
> the last couple of months have I been able to come up with something I
> feel is nicer (http://www.merlintec.com:8080/Hardware/RISC42). Two
> things that make the ARM great for implementing stuff like Squeak are
> the ability to use shifts and rotates with every instruction (allowing
> up to four registers to be specified instead of just three) and the
> ability to conditionally execute any instruction. The latter reduces the
> cost of doing quick stuff like clearing tags.

I like the LOGIC/KLOGIC instruction, it looks like a friend of BitBlt :)

How would Smalltalk's method lookup routine look on RISC42?

/Klaus




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