On 25-Oct-07, at 9:25 PM, Marcel Weiher wrote:

>
> - Montecito, the new dual-core Itanic has 1.72 billion transistors.
> - The ARM6 macrocell has around 35000 transistors
> - divide the two, and you will find that you could get more ARM6  
> cores for the Montecito transistor budget than the ARM6 has  
> transistors

Nicely pointed out Marcel! I've been trying to make a similar point  
for about, oh two decades now....

In fact around ten years ago TI announced some new technology  
relating to wafer scale fabrication (I think, don't hold me to this)  
and as an illustration of its possibilities they said it meant they  
could put (something like) 128 StrongARM cpus each with 4MB ram on a  
wafer.  Now let's say we take an easy path and put a mere 1000 ARM  
cores on a chip, so as to leave some room for caches and transputer- 
like links (I think someone actually did those for ARM at some point  
in the past) and interface stuff. ARM 1176 cores are rated for 800MHz  
with claims of up to 1GHz so we have potential for a quadrillion  
instruction per second. Even Microsoft would surely have trouble  
soaking up that much cpu with pointless fiddle-faddle.

If we got no better than 1% useful work because of poor code we'd  
still be getting 10 gips.


tim
--
tim Rowledge; tim at rowledge.org; http://www.rowledge.org/tim
Useful Latin Phrases:- Utinam logica falsa tuam philosophiam totam  
suffodiant! = May faulty logic undermine your entire philosophy!