[squeak-dev] Re: [vwnc] x86 sarl curiosity...

Martin McClure martin at hand2mouse.com
Wed Jan 21 21:29:46 UTC 2009

Eliot Miranda wrote:
> Hi All,
>     anyone know the x86/IA32 really well?  If so, read on.  Otherwise 
> save yourself the yawn.
> I just tried to save an instruction in Cog;s generated bitShift: 
> primitive.  It seems to me that SARL (shift arithmetic right long) 
> should set the sign flag based on the result, in fact it says as much in 
> the manual; I quote from IA-32 Intel® Architecture Software 
> Developer's Manual Volume 2B:  Instruction Set Reference, N-Z p 4-192
> Flags Affected 
> The CF flag contains the value of the last bit shifted out of the 
> destination operand; it is unde- 
> fined for SHL and SHR instructions where the count is greater than or 
> equal to the size (in bits) 
> of the destination operand. The OF flag is affected only for 1-bit 
> shifts (see "Description" 
> above); otherwise, it is undefined. The SF, ZF, and PF flags are set 
> according to the result. If the 
> count is 0, the flags are not affected. For a non-zero count, the AF 
> flag is undefined.
> (my emphasis added).  But neither the Bochs simulator nor my Intel Core 
> Duo set the flags when doing sarl $1, %eax when %eax contains -1.  Have 
> I misread, or is the manual wrong?

Interesting. FWIW, the AMD64 arch manual (vol 3, p.220) also says that 
an SAR will affect the SF flag.



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