On Apr 9, 2015, at 3:21 PM, Tobias Pape <Das.Linux at gmx.de> wrote:

> 
> On 10.04.2015, at 00:17, Tobias Pape <Das.Linux at gmx.de> wrote:
> 
>> Updated on the CI :)
> 
> aaand reverted. We got a crash: 
>    http://build.squeak.org/job/SqueakTrunk/1245/console

Yes.  I get a crash in updating with the v3 VM.  So far no problems with the Spur VM.  But Tibias, unless the bleeding edge gets tested how will I spit these regressions?  I need to know.  So can we not have two builds, one with the last known good and one with the bleeding edge?  Otherwise I'm flying blind.

> 
> Best
>    -Tobias
> 
>> Best
>>    -Tobias
>> On 09.04.2015, at 23:28, Eliot Miranda <eliot.miranda at gmail.com> wrote:
>> 
>>> ... at http://www.mirandabanda.org/files/Cog/VM/VM.r3308/.
>>> 
>>> CogVM binaries as per VMMaker.oscog-eem.1178/r3308
>>> 
>>> Plugins:
>>> Integrate Nicolas' fixes that use positiveMachineIntegerFor: for pointers.
>>> 
>>> Newspeak:
>>> Print a warning in the method shared under multiple selectors scenario.
>>> 
>>> Implement outer sends as clean sends just like implicit receiver sends. Add
>>> ObjectRepresentation>>illegalClassTag and use it for initializing and unlinking
>>> implicit and outer sends.
>>> 
>>> Newspeak & Sista:
>>> The multiple bytecode set block initial nil counters need
>>> to be specific to the bytecode set in effect.
>>> 
>>> Spur:
>>> Implement Clement's much better solution for the stale supersend problem.
>>> Place code at the send site for super sends to follow stale forwarded
>>> receivers.  This parallels the interpreter implementation.
>>> 
>>> Beef up the post-become scan of send sites to
>>> unlink all send sites that link to an invalid class tag.
>>> 
>>> Cogit:
>>> Optimize StackToRegisterMappingCogit>>genReturnReceiver
>>> to not load ReceiverResultReg if it already contains self.
>>> 
>>> Revise method map generation to provide multiple send type annotations.  Add
>>> an IsAnnotationExtension annotation type that implicitly has a zero displacement
>>> and uses its displacement bits to extend the preceeding IsSendCall annotation.
>>> This allows us to eliminate all the exotic entry-points and keep only the
>>> checked and unchecked entries.
>>> 
>>> Change IA32's genPushRegisterArgsForNumArgs: to not smash TempReg now that it
>>> is used in directed super send trampolines.
>>> 
>>> Use PushCq to pass small integer constants in the trampolines instead of
>>> smashing TempReg, which is now used to hold the directed supersend argument.
>>> Add support for PushCq.  Could use PushCw but on x86 PushCq is a lot shorter.
>>> 
>>> Mac builds: Use UTC as the timezone for the build timestamp.  Using the local
>>> timezone doesn't work :(.
> 
> 
>