[squeak-dev] Squeak RISC-V ISA 32I Implementation
tonyg at leastfixedpoint.com
Mon Jul 13 07:01:44 UTC 2020
On 7/12/20 9:30 PM, Eric Gade wrote:
> I've hit a small milestone on a personal project that I would like to
> share. It is a Squeak implementation of the RISC-V ISA, along with a
> (very basic for now) CPU and memory for simulation and testing. You can
> find the project here <https://github.com/darth-cheney/safe-bet/>.
This looks like fun!
What kinds of applications or experiments do you have in mind for it?
> The repo is called "Safe Bet" because it's a "small(talk) risc"
Also, this is an excellent name :-)
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