[Vm-dev] VM Maker: Cog-eem.126.mcz
commits at source.squeak.org
commits at source.squeak.org
Mon Dec 9 18:06:16 UTC 2013
Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.126.mcz
==================== Summary ====================
Name: Cog-eem.126
Author: eem
Time: 9 December 2013, 10:06:03.398 am
UUID: b095a0d7-06da-45d6-b21e-e6977328df30
Ancestors: Cog-eem.125
Refactor register state printing to provide printRegisterStateExceptPC:on:
=============== Diff against Cog-eem.125 ===============
Item was added:
+ ----- Method: BochsIA32Alien>>printFields:inRegisterState:on: (in category 'printing') -----
+ printFields: fields inRegisterState: registerStateVector on: aStream
+ | rsvs |
+ aStream ensureCr.
+ rsvs := registerStateVector readStream.
+ fields withIndexDo:
+ [:sym :index| | val |
+ sym = #cr
+ ifTrue: [aStream cr]
+ ifFalse:
+ [(val := rsvs next) isNil ifTrue: [^self].
+ (sym beginsWith: 'xmm')
+ ifTrue:
+ [aStream nextPutAll: sym; nextPut: $:; space.
+ val printOn: aStream base: 16 length: 16 padded: true.
+ aStream space; nextPut: $(.
+ "At the image level Float is apparently in big-endian format"
+ ((Float basicNew: 2)
+ at: 2 put: (val bitAnd: 16rFFFFFFFF);
+ at: 1 put: (val bitShift: -32);
+ yourself)
+ printOn: aStream.
+ aStream nextPut: $)]
+ ifFalse:
+ [aStream nextPutAll: sym; nextPut: $:; space.
+ val printOn: aStream base: 16 length: 8 padded: true.
+ #eflags == sym
+ ifTrue:
+ [aStream space.
+ 'C-P-A-ZS---O' withIndexDo:
+ [:flag :bitIndex|
+ flag ~= $- ifTrue:
+ [aStream nextPut: flag; nextPutAll: 'F='; print: (val bitAnd: 1 << (bitIndex - 1)) >> (bitIndex - 1); space]]]
+ ifFalse:
+ [val > 16 ifTrue:
+ [aStream space; nextPut: $(.
+ val printOn: aStream base: 10 length: 1 padded: false.
+ aStream nextPut: $)]]].
+ (fields at: index + 1) ~~ #cr ifTrue:
+ [aStream tab]]]!
Item was changed:
----- Method: BochsIA32Alien>>printRegisterState:on: (in category 'printing') -----
printRegisterState: registerStateVector on: aStream
+ self printFields:
+ ((registerStateVector size < 18
+ or: [(11 to: 18) allSatisfy: [:i| (registerStateVector at: i) isZero]])
- | rsvs fields|
- aStream ensureCr.
- rsvs := registerStateVector readStream.
- fields := (registerStateVector size < 18
- or: [(11 to: 18) allSatisfy: [:i| (registerStateVector at: i) isZero]])
ifTrue:
[#( eax ebx ecx edx cr
esp ebp esi edi cr
eip eflags cr )]
ifFalse:
[#( eax ebx ecx edx cr
esp ebp esi edi cr
eip eflags cr
xmm0low xmm1low cr
xmm2low xmm3low cr
xmm4low xmm5low cr
+ xmm6low xmm7low cr )])
+ inRegisterState: registerStateVector
+ on: aStream!
- xmm6low xmm7low cr )].
- fields withIndexDo:
- [:sym :index| | val |
- sym = #cr
- ifTrue: [aStream cr]
- ifFalse:
- [(val := rsvs next) isNil ifTrue: [^self].
- (sym beginsWith: 'xmm')
- ifTrue:
- [aStream nextPutAll: sym; nextPut: $:; space.
- val printOn: aStream base: 16 length: 16 padded: true.
- aStream space; nextPut: $(.
- "At the image level Float is apparently in big-endian format"
- ((Float basicNew: 2)
- at: 2 put: (val bitAnd: 16rFFFFFFFF);
- at: 1 put: (val bitShift: -32);
- yourself)
- printOn: aStream.
- aStream nextPut: $)]
- ifFalse:
- [aStream nextPutAll: sym; nextPut: $:; space.
- val printOn: aStream base: 16 length: 8 padded: true.
- #eflags == sym
- ifTrue:
- [aStream space.
- 'C-P-A-ZS---O' withIndexDo:
- [:flag :bitIndex|
- flag ~= $- ifTrue:
- [aStream nextPut: flag; nextPutAll: 'F='; print: (val bitAnd: 1 << (bitIndex - 1)) >> (bitIndex - 1); space]]]
- ifFalse:
- [val > 16 ifTrue:
- [aStream space; nextPut: $(.
- val printOn: aStream base: 10 length: 1 padded: false.
- aStream nextPut: $)]]].
- (fields at: index + 1) ~~ #cr ifTrue:
- [aStream tab]]]!
Item was added:
+ ----- Method: BochsIA32Alien>>printRegisterStateExceptPC:on: (in category 'printing') -----
+ printRegisterStateExceptPC: registerStateVector on: aStream
+ self printFields:
+ ((registerStateVector size < 18
+ or: [(11 to: 18) allSatisfy: [:i| (registerStateVector at: i) isZero]])
+ ifTrue:
+ [#( eax ebx ecx edx cr
+ esp ebp esi edi cr)]
+ ifFalse:
+ [#( eax ebx ecx edx cr
+ esp ebp esi edi cr
+ xmm0low xmm1low cr
+ xmm2low xmm3low cr
+ xmm4low xmm5low cr
+ xmm6low xmm7low cr )])
+ inRegisterState: registerStateVector
+ on: aStream!
Item was added:
+ ----- Method: GdbARMAlien>>printFields:inRegisterState:on: (in category 'printing') -----
+ printFields: fields inRegisterState: registerStateVector on: aStream
+ | rsvs |
+ aStream ensureCr.
+ rsvs := registerStateVector readStream.
+ fields withIndexDo:
+ [:sym :index| | val |
+ sym = #cr
+ ifTrue: [aStream cr]
+ ifFalse:
+ [(val := rsvs next) isNil ifTrue: [^self].
+ aStream nextPutAll: sym; nextPut: $:; space.
+ val printOn: aStream base: 16 length: 8 padded: true.
+ #eflags == sym
+ ifTrue:
+ [aStream space.
+ "'FIVCZN'"'--VCZN' withIndexDo:
+ [:flag :bitIndex|
+ flag ~= $- ifTrue:
+ [aStream nextPut: flag; nextPutAll: 'F='; print: (val bitAnd: 1 << (bitIndex - 1)) >> (bitIndex - 1); space]]]
+ ifFalse:
+ [val > 16 ifTrue:
+ [aStream space; nextPut: $(.
+ val printOn: aStream base: 10 length: 1 padded: false.
+ aStream nextPut: $)]].
+ (fields at: index + 1) ~~ #cr ifTrue:
+ [aStream tab]]]!
Item was changed:
----- Method: GdbARMAlien>>printRegisterState:on: (in category 'printing') -----
printRegisterState: registerStateVector on: aStream
+ self printFields: #( r0 r1 r2 r3 cr
+ r4 r5 r6 r7 cr
+ r8 r9 r10 r11 cr
+ r12 sp lr pc eflags cr)
+ inRegisterState: registerStateVector
+ on: aStream!
- | rsvs fields|
- aStream ensureCr.
- rsvs := registerStateVector readStream.
- fields := #( r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 sp lr pc eflags cr).
- fields withIndexDo:
- [:sym :index| | val |
- sym = #cr
- ifTrue: [aStream cr]
- ifFalse:
- [(val := rsvs next) isNil ifTrue: [^self].
- aStream nextPutAll: sym; nextPut: $:; space.
- val printOn: aStream base: 16 length: 8 padded: true.
- #eflags == sym
- ifTrue:
- [aStream space.
- "'FIVCZN'"'--VCZN' withIndexDo:
- [:flag :bitIndex|
- flag ~= $- ifTrue:
- [aStream nextPut: flag; nextPutAll: 'F='; print: (val bitAnd: 1 << (bitIndex - 1)) >> (bitIndex - 1); space]]]
- ifFalse:
- [val > 16 ifTrue:
- [aStream space; nextPut: $(.
- val printOn: aStream base: 10 length: 1 padded: false.
- aStream nextPut: $)]].
- (fields at: index + 1) ~~ #cr ifTrue:
- [aStream tab]]]!
Item was added:
+ ----- Method: GdbARMAlien>>printRegisterStateExceptPC:on: (in category 'printing') -----
+ printRegisterStateExceptPC: registerStateVector on: aStream
+ self printFields: #( r0 r1 r2 r3 cr
+ r4 r5 r6 r7 cr
+ r8 r9 r10 r11 cr
+ r12 sp lr eflags cr)
+ inRegisterState: registerStateVector
+ on: aStream!
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