[Vm-dev] VM Maker: VMMaker.oscog-eem.809.mcz

commits at source.squeak.org commits at source.squeak.org
Mon Jul 7 22:40:42 UTC 2014

Eliot Miranda uploaded a new version of VMMaker to project VM Maker:

==================== Summary ====================

Name: VMMaker.oscog-eem.809
Author: eem
Time: 7 July 2014, 3:38:06.132 pm
UUID: 4d6839cc-a316-4f78-a378-3bfaa4c72270
Ancestors: VMMaker.oscog-eem.808

On ARM the implciit receiver trampoline can use the LinkReg
to access the inline implciit receiver cache.

=============== Diff against VMMaker.oscog-eem.808 ===============

Item was changed:
  ----- Method: Cogit>>generateNewspeakRuntime (in category 'initialization') -----
  	<option: #NewspeakVM>
+ 	| jumpMiss jumpItsTheReceiverStupid retpcReg |
- 	| jumpMiss jumpItsTheReceiverStupid |
  	<var: #jumpMiss type: #'AbstractInstruction *'>
  	<var: #jumpItsTheReceiverStupid type: #'AbstractInstruction *'>
  	"Generate the non-send runtime support for Newspeak, explicit outer and implicit receiver.
  	 The dynamic frequency of explicit outer is so low we merely call an interpreter routine."
  	ceExplicitReceiverTrampoline := self genTrampolineFor: #ceExplicitReceiverAt:
  										called: 'ceExplicitReceiverTrampoline'
  										arg: SendNumArgsReg
  										result: ReceiverResultReg.
  	"Cached push implicit receiver implementation.  Caller looks like
  				mov selector, ClassReg
  				call ceImplicitReceiver
  				br continue
  		Lclass:	.word
  		Lmixin::	.word
  	 If class tag matches class of receiver then mixin contains either 0 or the implicit receiver.
  	 If 0, answer the actual receiver, otherwise the mixin.
  	 Generate the class fetch and cache probe inline for speed.
  	 Smashes Arg1Reg, RegClass and caller-saved regs."
  	opcodeIndex := 0.
  	self MoveMw: FoxMFReceiver r: FPReg R: ReceiverResultReg.
  		genGetInlineCacheClassTagFrom: ReceiverResultReg
  		into: ClassReg
  		forEntry: false.
+ 	backEnd hasLinkRegister
+ 		ifTrue: [retpcReg := LinkReg]
+ 		ifFalse: [self MoveMw: 0 r: SPReg R: (retpcReg := TempReg)].
+ 	self MoveMw: 0 r: SPReg R: retpcReg.
+ 	self MoveMw: backEnd jumpShortByteSize r: retpcReg R: Arg1Reg.
- 	self MoveMw: 0 r: SPReg R: TempReg.
- 	self MoveMw: backEnd jumpShortByteSize r: TempReg R: Arg1Reg.
  	self CmpR: ClassReg R: Arg1Reg.
  	jumpMiss := self JumpNonZero: 0.
+ 	self MoveMw: backEnd jumpShortByteSize + BytesPerOop r: retpcReg R: ClassReg.
- 	self MoveMw: backEnd jumpShortByteSize + BytesPerOop r: TempReg R: ClassReg.
  	self CmpCq: 0 R: ClassReg.
  	jumpItsTheReceiverStupid := self JumpZero: 0.
  	self MoveR: ClassReg R: ReceiverResultReg.
  	jumpItsTheReceiverStupid jmpTarget: (self RetN: 0).
  	jumpMiss jmpTarget: self Label.
  	ceImplicitReceiverTrampoline := self
  										genTrampolineFor: #ceImplicitReceiverFor:receiver:
  										called: 'ceImplicitReceiverTrampoline'
  										numArgs: 2
  										arg: SendNumArgsReg
  										arg: ReceiverResultReg
  										arg: nil
  										arg: nil
  										saveRegs: false
  										pushLinkReg: true
  										resultReg: ReceiverResultReg
  										appendOpcodes: true!

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