[Vm-dev] VM Maker: VMMaker.oscog-tpr.1412.mcz

commits at source.squeak.org commits at source.squeak.org
Mon Jul 13 19:01:40 UTC 2015


tim Rowledge uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-tpr.1412.mcz

==================== Summary ====================

Name: VMMaker.oscog-tpr.1412
Author: tpr
Time: 13 July 2015, 12:00:05.608 pm
UUID: c5b072c9-f74d-43af-9504-edd76655b0b4
Ancestors: VMMaker.oscog-tpr.1411

support calling ARM abi stuff that neds no stack fussing. Carefuly don't smash registers that dont orta be samshed

=============== Diff against VMMaker.oscog-tpr.1411 ===============

Item was changed:
  ----- Method: CogARMCompiler>>aeabiDiv:Mod: (in category 'simulation') -----
  aeabiDiv: dividend Mod: divisor
  "simulate the __aeabi_idivmod call"
+ 	<doNotGenerate>
  	|result|
  
  	cogit processor r0: (result :=dividend quo: divisor).
  	cogit processor r1: (dividend rem: divisor).
  	^result!

Item was changed:
  ----- Method: CogARMCompiler>>aeabiDivModFunctionAddr (in category 'ARM convenience instructions') -----
  aeabiDivModFunctionAddr
  "return the address of the __aeabi_idivmod() call provided by the ARM low level libs to do an integer divide that returns the quo in R0 and rem in R1"
  	<var: #'__aeabi_idivmod' declareC: 'extern void __aeabi_idivmod(int dividend, ind divisor)'>
+ 	^self cCode: '(usqInt)__aeabi_idivmod' inSmalltalk:[#aeabiDiv:Mod:]!
- 	^self cCode: '__aeabi_idivmod' inSmalltalk:[#aeabiDiv:Mod:]!

Item was changed:
  ----- Method: CogARMCompiler>>genDivR:R:Quo:Rem: (in category 'abstract instructions') -----
  genDivR: abstractRegDivisor R: abstractRegDividend Quo: abstractRegQuotient Rem: abstractRegRemainder
  "Currently no instruction level support for divide on ARM. See also #canDivQuoRem"
  	| rDividend rDivisor rQuotient rRemainder divRemFunctionAddr |
+ 	<var: #divRemFunctionAddr type: #usqInt>
- 
  	self assert: abstractRegDividend ~= abstractRegDivisor.
  	self assert: abstractRegQuotient ~= abstractRegRemainder.
  	rDividend := self concreteRegister: abstractRegDividend.
  	rDivisor := self concreteRegister: abstractRegDivisor.
  	rDividend = CArg0Reg ifFalse:[
  		"we need to move the value in rDividend to CArg0Reg. Best to double check if rDivisor is already using it first"
  		rDivisor = CArg0Reg ifTrue:[ "oh dear; we also need to move rDivisor's value out of the way first.. I'll move it to CArg1Reg and if some nitwit has managed to put rDividend there they deserve the crash"
  			rDividend = CArg1Reg ifTrue:[self error: 'register choices in genDivR:R:Quo:Rem: made life impossible'].
  			cogit MoveR: rDivisor R: CArg1Reg.
  			"and update rDivisor or we get buggerd by the next clause"
  			rDivisor := CArg1Reg].
  		cogit MoveR: rDividend R: CArg0Reg.
  	].
  	rDivisor = CArg1Reg ifFalse:[
  		cogit MoveR: rDivisor R: CArg1Reg].
  	divRemFunctionAddr := self aeabiDivModFunctionAddr.
  	cogit backEnd saveAndRestoreLinkRegAround:
  		[cogit CallFullRT: (self cCode: [divRemFunctionAddr asUnsignedInteger]
  					   inSmalltalk: [cogit simulatedTrampolineFor: divRemFunctionAddr])].
  	"Now we need to move the r0/1 results back to rQuotient & rRemainder"
  	rQuotient := self concreteRegister: abstractRegQuotient.
  	rRemainder := self concreteRegister: abstractRegRemainder.
  	rQuotient = CArg0Reg ifFalse:["oh good grief, not again"
  		cogit MoveR: CArg0Reg R: rQuotient.
  		rQuotient = CArg1Reg ifTrue:[self error: 'register choices in genDivR:R:Quo:Rem: made life impossible'] ].
  	rRemainder = CArg1Reg  ifFalse:[
  		cogit MoveR: CArg1Reg R: rRemainder].
  	
  				
  !

Item was changed:
  ----- Method: Cogit>>handleABICallOrJumpSimulationTrap:evaluable: (in category 'simulation only') -----
  handleABICallOrJumpSimulationTrap: aProcessorSimulationTrap evaluable: evaluable
+ 	<doNotGenerate>
  
  	self assert: aProcessorSimulationTrap type = #call.
  	processor
  		simulateLeafCallOf: aProcessorSimulationTrap address
  		nextpc: aProcessorSimulationTrap nextpc
  		memory: coInterpreter memory.
  	self recordInstruction: {'(simulated call of '. aProcessorSimulationTrap address. '/'. evaluable selector. ')'}.
  	evaluable valueWithArguments: (processor
  										postCallArgumentsNumArgs: evaluable numArgs
  										in: coInterpreter memory).
  	self recordInstruction: {'(simulated return to '. processor retpcIn: coInterpreter memory. ')'}.
  	processor
  		smashABICallerSavedRegistersWithValuesFrom: 16r80000000 by: objectMemory wordSize;
  		simulateLeafReturnIn: coInterpreter memory!



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