[Vm-dev] ARM Cog progress

[Holger Freyther]

> On 07 Jun 2015, at 17:58, tim Rowledge <tim at rowledge.org> wrote:
> 
> On the other hand, I can’t see how it is acceptable for a compiler to produce code that blows up at one level of optimisation but not at another. Come to that I’m not sure why there are different levels; I can sort of see asking to optimise in different ways  - the NorCroft compiler for ARM can be asked to optimise for runtime speed or executable size, for example.

Well, maybe look at the documentation. -O2 will enable certain optimization
passes that are legal according to the C specification but still are a trade-off (e.g.
between codesize and speed, being able to debug and speed, etc).

E.g. code like the below:

	int a, b;
        b = 10;
        /* a = b; */
        a += 2;
        return a;

might produce the result ’12’ in some optimizations and not in others. It might be
twelve because the register allocators allocates the same register for both ‘a’ and
‘b’ because the liveliness analysis has shown that usage of ‘a’ and ‘b’ are not in the
same basic blocks. Now complaining that the compiler doesn’t produce ’12’ all the
time would not be a smart thing to do.

GCC and other compilers (like any piece of software) have issues but you seem to
jump the gun. Identify the “file”/code that gets “miscompiled” and then see if the code
is valid C or a compiler issue. If it is a compiler issue one can report a bug to the GCC
folks (in recent years they gave a good track record of caring).

holger