[Vm-dev] VM Maker: Cog-eem.248.mcz

commits at source.squeak.org commits at source.squeak.org
Wed Mar 18 23:02:53 UTC 2015


Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.248.mcz

==================== Summary ====================

Name: Cog-eem.248
Author: eem
Time: 18 March 2015, 4:02:43.102 pm
UUID: 78d0538e-45cf-4ae1-8c6e-0c4f7bad7b7b
Ancestors: Cog-tpr.247

Do a better job of invalid address disassembly
in simulated leaf calls on ARM .

The target of a bl is unsigned (ARM disassembly decoration).

=============== Diff against Cog-tpr.247 ===============

Item was changed:
  ----- Method: CogProcessorAlien>>disassembleNextInstructionIn:for: (in category 'disassembly') -----
  disassembleNextInstructionIn: memory for: aSymbolManager "<Cogit|nil>"
  	| string |
  	string := self pc < memory size 
  				ifTrue: [(self primitiveDisassembleAt: self pc inMemory: memory) last.]
+ 				ifFalse: [string := aSymbolManager ifNotNil:
+ 									[aSymbolManager lookupAddress: self pc].
+ 						 ^self pc hex, ' : ', (string ifNil: ['Invalid address'])].
- 				ifFalse: [^self pc hex, ' : Invalid address'].
  	^aSymbolManager
  		ifNil: [string]
  		ifNotNil: [self decorateDisassembly: string for: aSymbolManager fromAddress: self pc]!

Item was changed:
  ----- Method: GdbARMAlien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') -----
  decorateDisassembly: anInstructionString for: aSymbolManager fromAddress: address
  	| word opcode rotate mode operand |
  	word := aSymbolManager objectMemory longAt: address.
  	(self instructionIsAnyB: word)
  		ifTrue:
  			[operand := word bitAnd: 16rFFFFFF.
  			 (operand anyMask: 16r800000) ifTrue:
  				[operand := operand - 16r1000000].
+ 			 operand := operand * 4 + address + 8 bitAnd: aSymbolManager addressSpaceMask]
- 			 operand := operand * 4 + address + 8]
  		ifFalse:
  			[opcode := word >> 21 bitAnd: 16rF.
  			 opcode ~= CogARMCompiler orOpcode ifTrue:
  				[^anInstructionString].
  			rotate := word >> 8 bitAnd: 16rF.
  			 mode := word >> 25 bitAnd: 7.
  			 "CogARMCompiler always uses a 0 rotate in the last operand of the final ORR when building long constants."
  			 (mode = 1 and: [rotate ~= 0]) ifTrue:
  				[^anInstructionString].
  			 operand := aSymbolManager backEnd literalBeforeFollowingAddress: address + 4].
  	"is there an intersting address with this?"
  	^(aSymbolManager lookupAddress: operand)
  		ifNotNil: [:string| anInstructionString, ' = ', (operand printStringRadix: 16), ' = ', string]
  		ifNil: [anInstructionString, ' = ', (operand printStringRadix: 16)]!

Item was changed:
  ----- Method: GdbARMAlien>>simulateLeafReturnIn: (in category 'execution simulation') -----
  simulateLeafReturnIn: aMemory
- "simulate a leaf return; this may get a bit more complicated since we are trying to compensate for the IA32 automagically pushing the return address whereas the ARM doesn't."
- self halt.
  	self pc: self lr!



More information about the Vm-dev mailing list