[Vm-dev] VM Maker: VMMaker.oscog-eem.1125.mcz

commits at source.squeak.org commits at source.squeak.org
Thu Mar 26 21:20:37 UTC 2015


Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1125.mcz

==================== Summary ====================

Name: VMMaker.oscog-eem.1125
Author: eem
Time: 26 March 2015, 2:17:38.667 pm
UUID: 7d683ed5-85b1-4f54-b6d6-f869fd20e944
Ancestors: VMMaker.oscog-eem.1124

On ARM the abort sequence pushes the link reg.
This means that in the stack overflow case the
link reg gets opushed twice and hence the trampoline must overwrite the stacked link reg
with the one for the ceMethodAbort call, not push
the link reg twice.  Now the system gets beyond
the first stack check into some interesting infinite
recursion around Interval(Object)>adaptToInteger:andCompare: ;)

=============== Diff against VMMaker.oscog-eem.1124 ===============

Item was changed:
  ----- Method: Cogit>>genMethodAbortTrampoline (in category 'initialization') -----
  genMethodAbortTrampoline
  	"Generate the abort for a method.  This abort performs either a call of ceSICMiss:
  	 to handle a single-in-line cache miss or a call of ceStackOverflow: to handle a
  	 stack overflow.  It distinguishes the two by testing ResultReceiverReg.  If the
  	 register is zero then this is a stack-overflow because a) the receiver has already
  	 been pushed and so can be set to zero before calling the abort, and b) the
  	 receiver must always contain an object (and hence be non-zero) on SIC miss."
  	| jumpSICMiss |
  	<var: #jumpSICMiss type: #'AbstractInstruction *'>
  	opcodeIndex := 0.
  	self CmpCq: 0 R: ReceiverResultReg.
  	jumpSICMiss := self JumpNonZero: 0.
  
+ 	"The abort sequencer has pushed the LinkReg a second time.
+ 	 Overwrite it with the right one."
+ 	backEnd hasLinkRegister ifTrue:
+ 		[self MoveR: LinkReg Mw: 0 r: SPReg].
  	self compileTrampolineFor: #ceStackOverflow:
  		numArgs: 1
  		arg: SendNumArgsReg
  		arg: nil
  		arg: nil
  		arg: nil
  		saveRegs: false
+ 		pushLinkReg: false "The LinkReg has already been set above."
- 		pushLinkReg: false "The LinkReg has already been pushed in the abort sequence."
  		resultReg: nil.
  	jumpSICMiss jmpTarget: self Label.
  	^self genTrampolineFor: #ceSICMiss:
  		called: 'ceMethodAbort'
  		numArgs: 1
  		arg: ReceiverResultReg
  		arg: nil
  		arg: nil
  		arg: nil
  		saveRegs: false
+ 		pushLinkReg: true "Push the LinkReg for the ceMethodAbort call."
- 		pushLinkReg: false "The LinkReg has already been pushed in the abort sequence."
  		resultReg: nil
  		appendOpcodes: true!

Item was changed:
  ----- Method: StackToRegisterMappingCogit>>genMethodAbortTrampolineFor: (in category 'initialization') -----
  genMethodAbortTrampolineFor: numArgs
  	
  	"Generate the abort for a method.  This abort performs either a call of ceSICMiss:
  	 to handle a single-in-line cache miss or a call of ceStackOverflow: to handle a
  	 stack overflow.  It distinguishes the two by testing ResultReceiverReg.  If the
  	 register is zero then this is a stack-overflow because a) the receiver has already
  	 been pushed and so can be set to zero before calling the abort, and b) the
  	 receiver must always contain an object (and hence be non-zero) on SIC miss."
  	| jumpSICMiss |
  	<var: #jumpSICMiss type: #'AbstractInstruction *'>
  	opcodeIndex := 0.
  	self CmpCq: 0 R: ReceiverResultReg.
  	jumpSICMiss := self JumpNonZero: 0.
  
+ 	"The abort sequencer has pushed the LinkReg a second time.
+ 	 Overwrite it with the right one."
+ 	backEnd hasLinkRegister ifTrue:
+ 		[self MoveR: LinkReg Mw: 0 r: SPReg].
  	self compileTrampolineFor: #ceStackOverflow:
  		numArgs: 1
  		arg: SendNumArgsReg
  		arg: nil
  		arg: nil
  		arg: nil
  		saveRegs: false
+ 		pushLinkReg: false "The LinkReg has already been set above."
- 		pushLinkReg: false "The LinkReg has already been pushed in the abort sequence."
  		resultReg: nil.
  	jumpSICMiss jmpTarget: self Label.
  	backEnd genPushRegisterArgsForAbortMissNumArgs: numArgs.
  	^self genTrampolineFor: #ceSICMiss:
  		called: (self trampolineName: 'ceMethodAbort' numArgs: (numArgs <= self numRegArgs ifTrue: [numArgs] ifFalse: [-1]))
  		numArgs: 1
  		arg: ReceiverResultReg
  		arg: nil
  		arg: nil
  		arg: nil
  		saveRegs: false
+ 		pushLinkReg: false "The LinkReg will have been pushed in genPushRegisterArgsForAbortMissNumArgs: above."
- 		pushLinkReg: false "The LinkReg has already been pushed in the abort sequence."
  		resultReg: nil
  		appendOpcodes: true!



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