[Vm-dev] [commit][3319] CogVM source as per VMMaker.oscog-eem.1288
commits at squeakvm.org
commits at squeakvm.org
Wed May 6 05:28:34 UTC 2015
Revision: 3319
Author: eliot
Date: 2015-05-05 22:28:32 -0700 (Tue, 05 May 2015)
Log Message:
-----------
CogVM source as per VMMaker.oscog-eem.1288
Spur:
Implement remembered table pruning via ref counts. The algorithm selectively
tenures objects to reduce the remembered table, instead of merely tenuring
everything.
Be selective about remembering tenurted objects; actually scan their contents
before remembering willy-nilly.
Make the allOldMarkedWeakObjectsOnWeaklingStack assert an eassert: (it /is/
extremely expensive) and correct some typos in eassert:.
Add an assert to insist that the receiver not be forwarded to mnuMethodOrNilFor:
StackVM:
Allow setting preemptionYields in the stack VM.
Sista:
trap callbacks have no argument any more.
Forgot a -1 which was creating a segfault....
Reduced by 24 bytes the instructions generated by #== in SistaCogit in most
cases.
Fixed a bug in SistaCogit where a trampoline needed a specific register instead of an allocated one.
CogARMCompiler:
Catch some places where values need to be typed as signed ints. At the least
this fixes a fun case where a
lrd r7, [r11, #-12]
became
ldr 77, [r11, #4084].
Cogit:
Remove all the "self flag: 'currently caller pushes result'." noise.
This was the right decision given StackToRegisterMappingCogit.
Modified Paths:
--------------
branches/Cog/nsspursrc/plugins/MiscPrimitivePlugin/MiscPrimitivePlugin.c
branches/Cog/nsspursrc/vm/cogit.h
branches/Cog/nsspursrc/vm/cogitARMv5.c
branches/Cog/nsspursrc/vm/cogitIA32.c
branches/Cog/nsspursrc/vm/cointerp.c
branches/Cog/nsspursrc/vm/cointerp.h
branches/Cog/nsspursrc/vm/gcc3x-cointerp.c
branches/Cog/nsspurstack64src/vm/gcc3x-interp.c
branches/Cog/nsspurstack64src/vm/interp.c
branches/Cog/nsspurstacksrc/vm/gcc3x-interp.c
branches/Cog/nsspurstacksrc/vm/interp.c
branches/Cog/spursistasrc/vm/cogit.h
branches/Cog/spursistasrc/vm/cointerp.c
branches/Cog/spursistasrc/vm/cointerp.h
branches/Cog/spursistasrc/vm/gcc3x-cointerp.c
branches/Cog/spursrc/vm/cogit.h
branches/Cog/spursrc/vm/cogitARMv5.c
branches/Cog/spursrc/vm/cogitIA32.c
branches/Cog/spursrc/vm/cointerp.c
branches/Cog/spursrc/vm/cointerp.h
branches/Cog/spursrc/vm/gcc3x-cointerp.c
branches/Cog/spurstack64src/vm/gcc3x-interp.c
branches/Cog/spurstack64src/vm/interp.c
branches/Cog/spurstacksrc/vm/gcc3x-interp.c
branches/Cog/spurstacksrc/vm/interp.c
branches/Cog/src/plugins/MiscPrimitivePlugin/MiscPrimitivePlugin.c
branches/Cog/src/vm/cogit.h
branches/Cog/src/vm/cogitARMv5.c
branches/Cog/src/vm/cogitIA32.c
branches/Cog/src/vm/cointerp.c
branches/Cog/src/vm/cointerp.h
branches/Cog/src/vm/cointerpmt.c
branches/Cog/src/vm/cointerpmt.h
branches/Cog/src/vm/gcc3x-cointerp.c
branches/Cog/src/vm/gcc3x-cointerpmt.c
branches/Cog/stacksrc/vm/gcc3x-interp.c
branches/Cog/stacksrc/vm/interp.c
Property Changed:
----------------
branches/Cog/platforms/Cross/vm/sqSCCSVersion.h
Modified: branches/Cog/nsspursrc/plugins/MiscPrimitivePlugin/MiscPrimitivePlugin.c
===================================================================
--- branches/Cog/nsspursrc/plugins/MiscPrimitivePlugin/MiscPrimitivePlugin.c 2015-05-03 21:57:16 UTC (rev 3318)
+++ branches/Cog/nsspursrc/plugins/MiscPrimitivePlugin/MiscPrimitivePlugin.c 2015-05-06 05:28:32 UTC (rev 3319)
@@ -1,17 +1,17 @@
/* Automatically generated by
- VMPluginCodeGenerator VMMaker.oscog-eem.1145 uuid: 945d0a43-e29d-4fb4-a1b8-263465636aec
+ VMPluginCodeGenerator VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e
from
- MiscPrimitivePlugin VMMaker.oscog-eem.1145 uuid: 945d0a43-e29d-4fb4-a1b8-263465636aec
- Bitmap * Graphics-tfel.308 uuid: 9ef14231-9bce-8848-b8a7-5d24ad6b8f2b
- ByteArray * Collections.spur-mt.605 uuid: abbeed47-9ec6-475f-8446-bb1ab0135cbf
- ByteString * Collections.spur-mt.605 uuid: abbeed47-9ec6-475f-8446-bb1ab0135cbf
- SampledSound Sound-bf.42 uuid: 01b2784a-0ad7-4a6b-a996-3388ab820acd
+ MiscPrimitivePlugin VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e
+ Bitmap * Graphics-mt.312 uuid: ad5f17db-6eed-a44f-a07c-cbfb9d4e09ee
+ ByteArray * Collections.spur-ul.610, Collections.spur-ul.627, Collections.spur-mt.631 uuid: 3448b17a-1361-47a8-af38-4c26b42dc028
+ ByteString * Collections.spur-ul.610, Collections.spur-ul.627, Collections.spur-mt.631 uuid: 3448b17a-1361-47a8-af38-4c26b42dc028
+ SampledSound Sound-topa.43 uuid: c1c2b948-6c86-4cf8-877d-1620433f558e
*/
-static char __buildInfo[] = "MiscPrimitivePlugin VMMaker.oscog-eem.1145 uuid: 945d0a43-e29d-4fb4-a1b8-263465636aec\n\
-Bitmap * Graphics-tfel.308 uuid: 9ef14231-9bce-8848-b8a7-5d24ad6b8f2b\n\
-ByteArray * Collections.spur-mt.605 uuid: abbeed47-9ec6-475f-8446-bb1ab0135cbf\n\
-ByteString * Collections.spur-mt.605 uuid: abbeed47-9ec6-475f-8446-bb1ab0135cbf\n\
-SampledSound Sound-bf.42 uuid: 01b2784a-0ad7-4a6b-a996-3388ab820acd " __DATE__ ;
+static char __buildInfo[] = "MiscPrimitivePlugin VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e\n\
+Bitmap * Graphics-mt.312 uuid: ad5f17db-6eed-a44f-a07c-cbfb9d4e09ee\n\
+ByteArray * Collections.spur-ul.610, Collections.spur-ul.627, Collections.spur-mt.631 uuid: 3448b17a-1361-47a8-af38-4c26b42dc028\n\
+ByteString * Collections.spur-ul.610, Collections.spur-ul.627, Collections.spur-mt.631 uuid: 3448b17a-1361-47a8-af38-4c26b42dc028\n\
+SampledSound Sound-topa.43 uuid: c1c2b948-6c86-4cf8-877d-1620433f558e " __DATE__ ;
@@ -90,9 +90,9 @@
struct VirtualMachine* interpreterProxy;
static const char *moduleName =
#ifdef SQUEAK_BUILTIN_PLUGIN
- "MiscPrimitivePlugin VMMaker.oscog-eem.1145 (i)"
+ "MiscPrimitivePlugin VMMaker.oscog-eem.1288 (i)"
#else
- "MiscPrimitivePlugin VMMaker.oscog-eem.1145 (e)"
+ "MiscPrimitivePlugin VMMaker.oscog-eem.1288 (e)"
#endif
;
@@ -748,7 +748,7 @@
pushInteger(0);
return null;
}
- for (startIndex = start, startIndexLimiT = (((sizeOfSTArrayFromCPrimitive(body + 1)) - (sizeOfSTArrayFromCPrimitive(key + 1))) + 1); startIndex <= startIndexLimiT; startIndex += 1) {
+ for (startIndex = (((start < 1) ? 1 : start)), startIndexLimiT = (((sizeOfSTArrayFromCPrimitive(body + 1)) - (sizeOfSTArrayFromCPrimitive(key + 1))) + 1); startIndex <= startIndexLimiT; startIndex += 1) {
index = 1;
while ((matchTable[(asciiValue(body[(startIndex + index) - 1])) + 1]) == (matchTable[(asciiValue(key[index])) + 1])) {
if (index == (sizeOfSTArrayFromCPrimitive(key + 1))) {
Modified: branches/Cog/nsspursrc/vm/cogit.h
===================================================================
--- branches/Cog/nsspursrc/vm/cogit.h 2015-05-03 21:57:16 UTC (rev 3318)
+++ branches/Cog/nsspursrc/vm/cogit.h 2015-05-06 05:28:32 UTC (rev 3319)
@@ -1,5 +1,5 @@
/* Automatically generated by
- CCodeGenerator VMMaker.oscog-eem.1241 uuid: a04410be-4749-4ca7-a350-4788549b0da4
+ CCodeGenerator VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e
*/
Modified: branches/Cog/nsspursrc/vm/cogitARMv5.c
===================================================================
--- branches/Cog/nsspursrc/vm/cogitARMv5.c 2015-05-03 21:57:16 UTC (rev 3318)
+++ branches/Cog/nsspursrc/vm/cogitARMv5.c 2015-05-06 05:28:32 UTC (rev 3319)
@@ -1,9 +1,9 @@
/* Automatically generated by
- CCodeGenerator VMMaker.oscog-eem.1240 uuid: b4f0eba3-7350-41a0-a8da-52fbc1568cc8
+ CCodeGenerator VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e
from
- StackToRegisterMappingCogit VMMaker.oscog-eem.1240 uuid: b4f0eba3-7350-41a0-a8da-52fbc1568cc8
+ StackToRegisterMappingCogit VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e
*/
-static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1240 uuid: b4f0eba3-7350-41a0-a8da-52fbc1568cc8 " __DATE__ ;
+static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1288 uuid: 909625f0-4d63-4a3b-84e1-1f2753923d7e " __DATE__ ;
char *__cogitBuildInfo = __buildInfo;
@@ -162,6 +162,7 @@
#define CMMaxUsageCount 7
#define CMMethod 2
#define CMOpenPIC 5
+#define CMPSMULL 123
#define CmpCqR 94
#define CmpCwR 101
#define CmpOpcode 10
@@ -251,7 +252,6 @@
#define Label 1
#define LargeContextSlots 62
#define LastJump 42
-#define LDMFD 120
#define LE 13
#define LinkReg -17
#define LoadEffectiveAddressMwrR 78
@@ -298,6 +298,7 @@
#define MoveRXwrR 51
#define MoveXbrRR 64
#define MoveXwrRR 50
+#define MSR 118
#define MULTIPLEBYTECODESETS 1
#define MulRdRd 112
#define NE 1
@@ -357,7 +358,6 @@
#define SSConstant 2
#define SSRegister 3
#define SSSpill 4
-#define STMFD 121
#define StackPointerIndex 2
#define Stop 13
#define SubCqR 96
@@ -413,7 +413,6 @@
static AbstractInstruction * jmpTarget(AbstractInstruction * self_in_jmpTarget, AbstractInstruction *anAbstractInstruction) NoDbgRegParms;
static unsigned long labelOffset(AbstractInstruction * self_in_labelOffset) NoDbgRegParms;
static sqInt numCheckFeaturesOpcodes(AbstractInstruction * self_in_numCheckFeaturesOpcodes) NoDbgRegParms;
-static sqInt numICacheFlushOpcodes(AbstractInstruction * self_in_numICacheFlushOpcodes) NoDbgRegParms;
static AbstractInstruction * relocateJumpLongBeforeFollowingAddressby(AbstractInstruction * self_in_relocateJumpLongBeforeFollowingAddressby, sqInt pc, sqInt delta) NoDbgRegParms;
static AbstractInstruction * resolveJumpTarget(AbstractInstruction * self_in_resolveJumpTarget) NoDbgRegParms;
static sqInt setLabelOffset(AbstractInstruction * self_in_setLabelOffset, sqInt aValue) NoDbgRegParms;
@@ -437,6 +436,7 @@
static sqInt concreteRegister(AbstractInstruction * self_in_concreteRegister, sqInt registerIndex) NoDbgRegParms;
static AbstractInstruction * concretizeAddRdRd(AbstractInstruction * self_in_concretizeAddRdRd) NoDbgRegParms;
static sqInt concretizeAt(AbstractInstruction * self_in_concretizeAt, sqInt actualAddress) NoDbgRegParms;
+static usqInt concretizeCMPSMULL(AbstractInstruction * self_in_concretizeCMPSMULL) NoDbgRegParms;
static AbstractInstruction * concretizeCmpRdRd(AbstractInstruction * self_in_concretizeCmpRdRd) NoDbgRegParms;
static void concretizeConditionalInstruction(AbstractInstruction * self_in_concretizeConditionalInstruction) NoDbgRegParms;
static AbstractInstruction * concretizeConvertRRd(AbstractInstruction * self_in_concretizeConvertRRd) NoDbgRegParms;
@@ -446,18 +446,18 @@
static AbstractInstruction * concretizeFillFromWord(AbstractInstruction * self_in_concretizeFillFromWord) NoDbgRegParms;
static AbstractInstruction * concretizeMoveM64rRd(AbstractInstruction * self_in_concretizeMoveM64rRd) NoDbgRegParms;
static AbstractInstruction * concretizeMoveRdM64r(AbstractInstruction * self_in_concretizeMoveRdM64r) NoDbgRegParms;
+static usqInt concretizeMSR(AbstractInstruction * self_in_concretizeMSR) NoDbgRegParms;
static AbstractInstruction * concretizeMulRdRd(AbstractInstruction * self_in_concretizeMulRdRd) NoDbgRegParms;
static usqInt concretizeSMULL(AbstractInstruction * self_in_concretizeSMULL) NoDbgRegParms;
static AbstractInstruction * concretizeSqrtRd(AbstractInstruction * self_in_concretizeSqrtRd) NoDbgRegParms;
static AbstractInstruction * concretizeSubRdRd(AbstractInstruction * self_in_concretizeSubRdRd) NoDbgRegParms;
-static sqInt condition(AbstractInstruction * self_in_condition) NoDbgRegParms;
-static sqInt condition(AbstractInstruction * self_in_condition, sqInt condCode) NoDbgRegParms;
static sqInt cResultRegister(AbstractInstruction * self_in_cResultRegister) NoDbgRegParms;
static sqInt dataOpTyperdrnrmlsr(AbstractInstruction * self_in_dataOpTyperdrnrmlsr, sqInt armOpcode, sqInt destReg, sqInt srcReg, sqInt addReg, sqInt shft) NoDbgRegParms;
static void dispatchConcretize(AbstractInstruction * self_in_dispatchConcretize) NoDbgRegParms;
static sqInt extract32BitOperandFrom4InstructionsPreceeding(AbstractInstruction * self_in_extract32BitOperandFrom4InstructionsPreceeding, sqInt addr) NoDbgRegParms;
static sqInt fullCallsAreRelative(AbstractInstruction * self_in_fullCallsAreRelative) NoDbgRegParms;
static sqInt genAlignCStackSavingRegistersnumArgswordAlignment(AbstractInstruction * self_in_genAlignCStackSavingRegistersnumArgswordAlignment, sqInt saveRegs, sqInt numArgs, sqInt alignment) NoDbgRegParms;
+static AbstractInstruction * genDivRRQuoRem(AbstractInstruction * self_in_genDivRRQuoRem, sqInt abstractRegDivisor, sqInt abstractRegDividend, sqInt abstractRegQuotient, sqInt abstractRegRemainder) NoDbgRegParms;
static AbstractInstruction * genGetLeafCallStackPointerFunction(AbstractInstruction * self_in_genGetLeafCallStackPointerFunction) NoDbgRegParms;
static sqInt genLoadCStackPointer(AbstractInstruction * self_in_genLoadCStackPointer) NoDbgRegParms;
static sqInt genLoadCStackPointers(AbstractInstruction * self_in_genLoadCStackPointers) NoDbgRegParms;
@@ -469,6 +469,7 @@
static AbstractInstruction * genPushRegisterArgsForNumArgs(AbstractInstruction * self_in_genPushRegisterArgsForNumArgs, sqInt numArgs) NoDbgRegParms;
static sqInt genRemoveNArgsFromStack(AbstractInstruction * self_in_genRemoveNArgsFromStack, sqInt n) NoDbgRegParms;
static AbstractInstruction * genRestoreRegs(AbstractInstruction * self_in_genRestoreRegs) NoDbgRegParms;
+static AbstractInstruction * genRestoreRegsExcept(AbstractInstruction * self_in_genRestoreRegsExcept, sqInt abstractReg) NoDbgRegParms;
static AbstractInstruction * genSaveRegisters(AbstractInstruction * self_in_genSaveRegisters) NoDbgRegParms;
static sqInt genSaveStackPointers(AbstractInstruction * self_in_genSaveStackPointers) NoDbgRegParms;
static AbstractInstruction * genSubstituteReturnAddress(AbstractInstruction * self_in_genSubstituteReturnAddress, sqInt retpc) NoDbgRegParms;
@@ -484,8 +485,7 @@
static sqInt instructionIsOR(AbstractInstruction * self_in_instructionIsOR, sqInt instr) NoDbgRegParms;
static sqInt instructionIsPush(AbstractInstruction * self_in_instructionIsPush, sqInt instr) NoDbgRegParms;
static sqInt instructionSizeAt(AbstractInstruction * self_in_instructionSizeAt, sqInt pc) NoDbgRegParms;
-static sqInt isAddressRelativeToVarBase(AbstractInstruction * self_in_isAddressRelativeToVarBase, sqInt varAddress) NoDbgRegParms;
-static sqInt isBranch(AbstractInstruction * self_in_isBranch, sqInt anInstruction) NoDbgRegParms;
+static sqInt isAddressRelativeToVarBase(AbstractInstruction * self_in_isAddressRelativeToVarBase, usqInt varAddress) NoDbgRegParms;
static sqInt isCallPreceedingReturnPC(AbstractInstruction * self_in_isCallPreceedingReturnPC, sqInt mcpc) NoDbgRegParms;
static sqInt isInImmediateJumpRange(AbstractInstruction * self_in_isInImmediateJumpRange, unsigned long operand) NoDbgRegParms;
static sqInt isJumpAt(AbstractInstruction * self_in_isJumpAt, sqInt pc) NoDbgRegParms;
@@ -519,8 +519,10 @@
static sqInt movsrn(AbstractInstruction * self_in_movsrn, sqInt destReg, sqInt srcReg) NoDbgRegParms;
static sqInt movimmror(AbstractInstruction * self_in_movimmror, sqInt destReg, sqInt immediate8bitValue, sqInt rot) NoDbgRegParms;
static sqInt movrn(AbstractInstruction * self_in_movrn, sqInt destReg, sqInt srcReg) NoDbgRegParms;
+static sqInt msr(AbstractInstruction * self_in_msr, sqInt flags) NoDbgRegParms;
static sqInt mvnimmror(AbstractInstruction * self_in_mvnimmror, sqInt destReg, sqInt immediate8bitValue, sqInt rot) NoDbgRegParms;
static AbstractInstruction * nopsFromto(AbstractInstruction * self_in_nopsFromto, sqInt startAddr, sqInt endAddr) NoDbgRegParms;
+static sqInt numICacheFlushOpcodes(AbstractInstruction * self_in_numICacheFlushOpcodes) NoDbgRegParms;
static sqInt orrimmror(AbstractInstruction * self_in_orrimmror, sqInt destReg, sqInt immediate8bitValue, sqInt rot) NoDbgRegParms;
static AbstractInstruction * padIfPossibleWithNopsFromto(AbstractInstruction * self_in_padIfPossibleWithNopsFromto, sqInt startAddr, sqInt endAddr) NoDbgRegParms;
static sqInt popR(AbstractInstruction * self_in_popR, sqInt dstReg) NoDbgRegParms;
@@ -532,11 +534,13 @@
static sqInt rewriteCallFullAttarget(AbstractInstruction * self_in_rewriteCallFullAttarget, sqInt callSiteReturnAddress, sqInt callTargetAddress) NoDbgRegParms;
static sqInt rewriteFullTransferAttargetexpectedInstruction(AbstractInstruction * self_in_rewriteFullTransferAttargetexpectedInstruction, usqInt callSiteReturnAddress, usqInt callTargetAddress, sqInt expectedInstruction) NoDbgRegParms;
static sqInt rewriteInlineCacheAttagtarget(AbstractInstruction * self_in_rewriteInlineCacheAttagtarget, usqInt callSiteReturnAddress, sqInt cacheTag, usqInt callTargetAddress) NoDbgRegParms;
+static AbstractInstruction * rewriteInlineCacheTagat(AbstractInstruction * self_in_rewriteInlineCacheTagat, sqInt cacheTag, sqInt callSiteReturnAddress) NoDbgRegParms;
static sqInt rewriteJumpFullAttarget(AbstractInstruction * self_in_rewriteJumpFullAttarget, sqInt callSiteReturnAddress, sqInt callTargetAddress) NoDbgRegParms;
static sqInt setsConditionCodesFor(AbstractInstruction * self_in_setsConditionCodesFor, sqInt aConditionalJumpOpcode) NoDbgRegParms;
static sqInt shiftSetsConditionCodesFor(AbstractInstruction * self_in_shiftSetsConditionCodesFor, sqInt aConditionalJumpOpcode) NoDbgRegParms;
static usqInt sizePCDependentInstructionAt(AbstractInstruction * self_in_sizePCDependentInstructionAt, sqInt eventualAbsoluteAddress) NoDbgRegParms;
static sqInt stackPageInterruptHeadroomBytes(AbstractInstruction * self_in_stackPageInterruptHeadroomBytes) NoDbgRegParms;
+static AbstractInstruction * storeLiteralbeforeFollowingAddress(AbstractInstruction * self_in_storeLiteralbeforeFollowingAddress, sqInt literal, sqInt followingAddress) NoDbgRegParms;
static sqInt strbrnplusimm(AbstractInstruction * self_in_strbrnplusimm, sqInt destReg, sqInt baseReg, sqInt u, sqInt immediate12bitValue) NoDbgRegParms;
static sqInt strbrnrm(AbstractInstruction * self_in_strbrnrm, sqInt srcReg, sqInt baseReg, sqInt offsetReg) NoDbgRegParms;
static sqInt strrnplusImm(AbstractInstruction * self_in_strrnplusImm, sqInt srcReg, sqInt baseReg, sqInt immediate12bitValue) NoDbgRegParms;
@@ -545,7 +549,6 @@
static sqInt subsrnimmror(AbstractInstruction * self_in_subsrnimmror, sqInt destReg, sqInt srcReg, sqInt immediate, sqInt rot) NoDbgRegParms;
static sqInt subrnimmror(AbstractInstruction * self_in_subrnimmror, sqInt destReg, sqInt srcReg, sqInt immediate, sqInt rot) NoDbgRegParms;
static sqInt tstrnimmror(AbstractInstruction * self_in_tstrnimmror, sqInt ignored, sqInt srcReg, sqInt immediate, sqInt rot) NoDbgRegParms;
-static sqInt wantsNearAddressFor(AbstractInstruction * self_in_wantsNearAddressFor, sqInt anObject) NoDbgRegParms;
static CogMethod * cmHomeMethod(CogBlockMethod * self_in_cmHomeMethod) NoDbgRegParms;
static sqInt isBranch(BytecodeDescriptor * self_in_isBranch) NoDbgRegParms;
static AbstractInstruction * gAndCqR(sqInt quickConstant, sqInt reg) NoDbgRegParms;
@@ -657,7 +660,7 @@
static sqInt genSafeTrampolineForcalled(void *aRoutine, char *aString) NoDbgRegParms;
static sqInt genSafeTrampolineForcalledarg(void *aRoutine, char *aString, sqInt regOrConst0) NoDbgRegParms;
static sqInt genSafeTrampolineForcalledargarg(void *aRoutine, char *aString, sqInt regOrConst0, sqInt regOrConst1) NoDbgRegParms;
-static sqInt genSmalltalkToCStackSwitch(void);
+static sqInt genSmalltalkToCStackSwitch(sqInt pushLinkReg) NoDbgRegParms;
static sqInt genTrampolineForcalled(void *aRoutine, char *aString) NoDbgRegParms;
static sqInt genTrampolineForcalledargargargresult(void *aRoutine, char *aString, sqInt regOrConst0, sqInt regOrConst1, sqInt regOrConst2, sqInt resultReg) NoDbgRegParms;
static sqInt genTrampolineForcalledargargresult(void *aRoutine, char *aString, sqInt regOrConst0, sqInt regOrConst1, sqInt resultReg) NoDbgRegParms;
@@ -860,7 +863,7 @@
static sqInt genEnsureObjInRegNotForwardedscratchReg(sqInt reg, sqInt scratch) NoDbgRegParms;
static sqInt genEnsureObjInRegNotForwardedscratchRegupdatingMwr(sqInt reg, sqInt scratch, sqInt offset, sqInt baseReg) NoDbgRegParms;
static sqInt genEnsureOopInRegNotForwardedscratchReg(sqInt reg, sqInt scratch) NoDbgRegParms;
-static sqInt genEnsureOopInRegNotForwardedscratchRegjumpBackTo(sqInt reg, sqInt scratch, sqInt instruction) NoDbgRegParms;
+static sqInt genEnsureOopInRegNotForwardedscratchRegjumpBackTo(sqInt reg, sqInt scratch, AbstractInstruction *instruction) NoDbgRegParms;
static void generateObjectRepresentationTrampolines(void);
static sqInt genGetActiveContextNumArgslargeinBlock(sqInt numArgs, sqInt isLargeContext, sqInt isInBlock) NoDbgRegParms;
static sqInt genGetBitsofFormatByteOfintobaseHeaderIntoScratch(sqInt mask, sqInt sourceReg, sqInt destReg, sqInt scratchReg) NoDbgRegParms;
@@ -947,6 +950,8 @@
static sqInt genLongStoreTemporaryVariableBytecode(void);
static sqInt genLongUnconditionalBackwardJump(void);
static sqInt genLongUnconditionalForwardJump(void);
+static AbstractInstruction * genMoveFalseR(sqInt reg) NoDbgRegParms;
+static AbstractInstruction * genMoveTrueR(sqInt reg) NoDbgRegParms;
static sqInt genMustBeBooleanTrampolineForcalled(sqInt boolean, char *trampolineName) NoDbgRegParms;
static sqInt genPrimitiveEqual(void);
static sqInt genPrimitiveFloatAdd(void);
@@ -963,7 +968,6 @@
static sqInt genPrimitiveGreaterThan(void);
static sqInt genPrimitiveLessOrEqual(void);
static sqInt genPrimitiveLessThan(void);
-static sqInt genPrimitiveNewMethod(void);
static sqInt genPrimitiveNotEqual(void);
static void genPrimReturnEnterCogCodeEnilopmart(sqInt profiling) NoDbgRegParms;
static sqInt genPushClosureTempsBytecode(void);
@@ -1002,6 +1006,8 @@
static sqInt genStoreRemoteTempLongBytecode(void);
static void maybeCompileAllocFillerCheck(void);
void recordCallOffsetInof(CogMethod *cogMethod, void *callLabelArg);
+static sqInt registerisInMask(sqInt reg, sqInt mask) NoDbgRegParms;
+static sqInt returnRegForStoreCheck(void);
void rewritePrimInvocationInto(CogMethod *cogMethod, void (*primFunctionPointer)(void));
static sqInt v3BlockCodeSize(BytecodeDescriptor *descriptor, sqInt pc, sqInt nExts, sqInt aMethodObj) NoDbgRegParms;
static sqInt v3LongForwardBranchDistance(BytecodeDescriptor *descriptor, sqInt pc, sqInt nExts, sqInt aMethodObj) NoDbgRegParms;
@@ -1012,7 +1018,7 @@
static sqInt v4LongBranchDistance(BytecodeDescriptor *descriptor, sqInt pc, sqInt nExts, sqInt aMethodObj) NoDbgRegParms;
void voidCogCompiledCode(void);
static BlockStart * addBlockStartAtnumArgsnumCopiedspan(sqInt bytecodepc, sqInt numArgs, sqInt numCopied, sqInt span) NoDbgRegParms;
-static sqInt allocateRegForStackTopEntry(void);
+static sqInt allocateRegForStackEntryAtnotConflictingWith(sqInt index, sqInt regMask) NoDbgRegParms;
static sqInt allocateRegNotConflictingWith(sqInt regMask) NoDbgRegParms;
static void annotateBytecodeIfAnnotated(CogSimStackEntry *aSimStackEntry) NoDbgRegParms;
static sqInt anyReferencesToRegisterinTopNItems(sqInt reg, sqInt n) NoDbgRegParms;
@@ -1042,6 +1048,7 @@
static sqInt genCallPrimitiveBytecode(void);
static sqInt genDoubleArithmeticpreOpCheck(sqInt arithmeticOperator, AbstractInstruction *(*preOpCheckOrNil)(int rcvrReg, int argReg)) NoDbgRegParms;
static sqInt genDoubleComparisoninvert(AbstractInstruction *(*jumpOpcodeGenerator)(void *), sqInt invertComparison) NoDbgRegParms;
+static sqInt genEqualsEqualsNoBranchArgIsConstantrcvrIsConstantargRegrcvrReg(sqInt argIsConstant, sqInt rcvrIsConstant, sqInt argReg, sqInt rcvrReg) NoDbgRegParms;
static sqInt genExternalizePointersForPrimitiveCall(void);
static sqInt genExtPushClosureBytecode(void);
static void generateEnilopmarts(void);
@@ -1049,14 +1056,11 @@
static void generateNewspeakSendTrampolines(void);
static void generateSendTrampolines(void);
static void generateTracingTrampolines(void);
-static sqInt genFramelessStorePopReceiverVariable(sqInt popBoolean, sqInt slotIndex) NoDbgRegParms;
static sqInt genJumpBackTo(sqInt targetBytecodePC) NoDbgRegParms;
static sqInt genJumpIfto(sqInt boolean, sqInt targetBytecodePC) NoDbgRegParms;
static sqInt genJumpTo(sqInt targetBytecodePC) NoDbgRegParms;
static sqInt genMarshalledSendnumArgssendTable(sqInt selector, sqInt numArgs, sqInt *sendTable) NoDbgRegParms;
static sqInt genMethodAbortTrampolineFor(sqInt numArgs) NoDbgRegParms;
-static AbstractInstruction * genMoveFalseR(sqInt reg) NoDbgRegParms;
-static AbstractInstruction * genMoveTrueR(sqInt reg) NoDbgRegParms;
static sqInt genNullaryInlinePrimitive(sqInt prim) NoDbgRegParms;
static sqInt genPICAbortTrampolineFor(sqInt numArgs) NoDbgRegParms;
static sqInt genPICMissTrampolineFor(sqInt numArgs) NoDbgRegParms;
@@ -1081,6 +1085,7 @@
static sqInt genPrimitiveMod(void);
static sqInt genPrimitiveMultiply(void);
static sqInt genPrimitiveNew(void);
+static sqInt genPrimitiveNewMethod(void);
static sqInt genPrimitiveNewWithArg(void);
static sqInt genPrimitiveNotIdentical(void);
static sqInt genPrimitiveQuo(void);
@@ -1142,9 +1147,7 @@
static sqInt picAbortTrampolineFor(sqInt numArgs) NoDbgRegParms;
static sqInt prevInstIsPCAnnotated(void);
static sqInt pushNilSizenumInitialNils(sqInt aMethodObj, sqInt numInitialNils) NoDbgRegParms;
-static sqInt registerisInMask(sqInt reg, sqInt mask) NoDbgRegParms;
static void reinitializeFixupsFromthrough(sqInt start, sqInt end) NoDbgRegParms;
-static sqInt returnRegForStoreCheck(void);
static void scanBlock(BlockStart *blockStart) NoDbgRegParms;
static sqInt scanMethod(void);
static void ssAllocateCallReg(sqInt requiredReg) NoDbgRegParms;
@@ -1165,6 +1168,7 @@
static sqInt ssPushRegister(sqInt reg) NoDbgRegParms;
static void ssPush(sqInt n) NoDbgRegParms;
static sqInt ssStorePoptoPreferredReg(sqInt popBoolean, sqInt preferredReg) NoDbgRegParms;
+static void ssStorePoptoReg(sqInt popBoolean, sqInt reg) NoDbgRegParms;
static CogSimStackEntry * ssTop(void);
static CogSimStackEntry ssTopDescriptor(void);
static CogSimStackEntry * ssValue(sqInt n) NoDbgRegParms;
@@ -1850,6 +1854,7 @@
/*** Macros ***/
+#define flushICacheFromto(me,startAddress,endAddress) __clear_cache((char*) startAddress, (char*) (endAddress + 4))
#define numberOfSaveableRegisters(self) 0
#define cPICNumCases stackCheckOffset
#define cPICNumCasesHack hack hack hack i.e. the getter macro does all the work
@@ -2064,18 +2069,6 @@
}
-/* If the processor has the ablity to generate code to flush the icache
- answer the number of opcodes required to compile an accessor for the
- feature.
- */
-
-static sqInt
-numICacheFlushOpcodes(AbstractInstruction * self_in_numICacheFlushOpcodes)
-{
- return 0;
-}
-
-
/* We assume here that calls and jumps look the same as regards their
displacement. This works on at least x86, ARM and x86_64. Processors on
which that isn't the
@@ -2331,7 +2324,7 @@
|| (instructionIsBL(self_in_callTargetFromReturnAddress, call)));
/* begin extractOffsetFromBL: */
relativeJump = call & 0xFFFFFF;
- relativeJump = ((bitAt(relativeJump, 24)) == 1
+ relativeJump = (relativeJump & (1 << 23)
? ((sqInt) ((relativeJump | 0x3F000000) << 2))
: relativeJump << 2);
callDistance = relativeJump;
@@ -2372,6 +2365,8 @@
case FillFromWord:
case Nop:
case SMULL:
+ case MSR:
+ case CMPSMULL:
case Call:
case JumpR:
case Jump:
@@ -2684,6 +2679,25 @@
return actualAddress + ((self_in_concretizeAt->machineCodeSize));
}
+
+/* Generate a CMP a, b, ASR #31 instruction, specifically for comparing the
+ resutls of SMULLs in genMulR:R:
+ */
+
+static usqInt
+concretizeCMPSMULL(AbstractInstruction * self_in_concretizeCMPSMULL)
+{
+ sqInt hiReg;
+ sqInt loReg;
+
+ hiReg = concreteRegister(self_in_concretizeCMPSMULL, ((self_in_concretizeCMPSMULL->operands))[0]);
+ loReg = concreteRegister(self_in_concretizeCMPSMULL, ((self_in_concretizeCMPSMULL->operands))[1]);
+ /* begin machineCodeAt:put: */
+ ((self_in_concretizeCMPSMULL->machineCode))[0 / 4] = ((((((AL << 28) | ((0 << 25) | ((CmpOpcode << 21) | (1 << 20)))) | ((hiReg << 16) | (0 << 12))) + (0x1F << 7)) + (2 << 5)) + loReg);
+ self_in_concretizeCMPSMULL;
+ return ((self_in_concretizeCMPSMULL->machineCodeSize) = 4);
+}
+
static AbstractInstruction *
concretizeCmpRdRd(AbstractInstruction * self_in_concretizeCmpRdRd)
{
@@ -2701,17 +2715,17 @@
sqInt aWord;
sqInt i;
sqInt instr;
- sqInt savedCond;
+ unsigned char savedCond;
- assert((conditionOrNil()) != null);
- savedCond = conditionOrNil();
- conditionOrNil() = null;
+ assert(((self_in_concretizeConditionalInstruction->conditionOrNil)) != null);
+ savedCond = (self_in_concretizeConditionalInstruction->conditionOrNil);
+ (self_in_concretizeConditionalInstruction->conditionOrNil) = null;
dispatchConcretize(self_in_concretizeConditionalInstruction);
- conditionOrNil() = savedCond;
+ (self_in_concretizeConditionalInstruction->conditionOrNil) = savedCond;
for (i = 0; i < ((self_in_concretizeConditionalInstruction->machineCodeSize)); i += 4) {
instr = (((((self_in_concretizeConditionalInstruction->machineCode))[i / 4]) | (15 << 28)) - (15 << 28));
/* begin machineCodeAt:put: */
- aWord = instr | (((conditionOrNil()) & 15) << 28);
+ aWord = instr | ((((self_in_concretizeConditionalInstruction->conditionOrNil)) & 15) << 28);
((self_in_concretizeConditionalInstruction->machineCode))[i / 4] = aWord;
self_in_concretizeConditionalInstruction;
}
@@ -2785,6 +2799,30 @@
return self_in_concretizeMoveRdM64r;
}
+
+/* Generate an MSR CPSR_f, #flags instruction.
+ Note that we only have business with the NZCV flags so we use
+ N -> 8
+ Z -> 4
+ C -> 2
+ V -> 1.
+ You don't want to mess with this too much.
+ */
+
+static usqInt
+concretizeMSR(AbstractInstruction * self_in_concretizeMSR)
+{
+ sqInt aWord;
+ sqInt flags;
+
+ flags = concreteRegister(self_in_concretizeMSR, ((self_in_concretizeMSR->operands))[0]);
+ /* begin machineCodeAt:put: */
+ aWord = msr(self_in_concretizeMSR, flags);
+ ((self_in_concretizeMSR->machineCode))[0 / 4] = aWord;
+ self_in_concretizeMSR;
+ return ((self_in_concretizeMSR->machineCodeSize) = 4);
+}
+
static AbstractInstruction *
concretizeMulRdRd(AbstractInstruction * self_in_concretizeMulRdRd)
{
@@ -2793,20 +2831,25 @@
return self_in_concretizeMulRdRd;
}
+
+/* Generate an SMULL loResultReg, hiResultReg, srcA, srcB instruction */
+
static usqInt
concretizeSMULL(AbstractInstruction * self_in_concretizeSMULL)
{
- sqInt destReg;
- sqInt hiReg;
- sqInt loReg;
- sqInt srcReg;
+ sqInt hiResultReg;
+ sqInt loResultReg;
+ sqInt srcA;
+ sqInt srcB;
- srcReg = concreteRegister(self_in_concretizeSMULL, ((self_in_concretizeSMULL->operands))[0]);
- destReg = concreteRegister(self_in_concretizeSMULL, ((self_in_concretizeSMULL->operands))[1]);
- hiReg = concreteRegister(self_in_concretizeSMULL, RISCTempReg);
- loReg = concreteRegister(self_in_concretizeSMULL, TempReg);
+
+ /* NOTE: srcB contains the other mutiplicand at this point. It is OK to use it as the destination for the low part of the result and in fact this saves us moving it later */
+
+ srcA = concreteRegister(self_in_concretizeSMULL, ((self_in_concretizeSMULL->operands))[0]);
+ loResultReg = (srcB = concreteRegister(self_in_concretizeSMULL, ((self_in_concretizeSMULL->operands))[1]));
+ hiResultReg = concreteRegister(self_in_concretizeSMULL, RISCTempReg);
/* begin machineCodeAt:put: */
- ((self_in_concretizeSMULL->machineCode))[0 / 4] = ((((((AL << 28) | ((0 << 25) | ((6 << 21) | (0 << 20)))) | ((hiReg << 16) | (loReg << 12))) + (srcReg << 8)) + (9 << 4)) + destReg);
+ ((self_in_concretizeSMULL->machineCode))[0 / 4] = ((((((AL << 28) | ((0 << 25) | ((6 << 21) | (0 << 20)))) | ((hiResultReg << 16) | (loResultReg << 12))) + (srcA << 8)) + (9 << 4)) + srcB);
self_in_concretizeSMULL;
return ((self_in_concretizeSMULL->machineCodeSize) = 4);
}
@@ -2827,19 +2870,7 @@
return self_in_concretizeSubRdRd;
}
-static sqInt
-condition(AbstractInstruction * self_in_condition)
-{
- return conditionOrNil();
-}
-static sqInt
-condition(AbstractInstruction * self_in_condition, sqInt condCode)
-{
- return (conditionOrNil() = condCode);
-}
-
-
/* Answer the abstract register for the C result register.
Only partially implemented. Works on x86 since TempReg = EAX = C result
reg. */
@@ -2916,6 +2947,8 @@
sqInt aWord14;
sqInt aWord140;
sqInt aWord141;
+ sqInt aWord142;
+ sqInt aWord143;
sqInt aWord15;
sqInt aWord16;
sqInt aWord17;
@@ -3039,8 +3072,6 @@
sqInt aWord8;
sqInt aWord80;
sqInt aWord81;
- sqInt aWord82;
- sqInt aWord83;
sqInt aWord9;
sqInt base;
sqInt base1;
@@ -3048,22 +3079,19 @@
sqInt base3;
sqInt baseReg;
sqInt baseReg1;
- sqInt constant;
- sqInt constant1;
+ usqInt constant;
+ usqInt constant1;
unsigned long constant10;
- sqInt constant11;
+ unsigned long constant11;
unsigned long constant12;
unsigned long constant13;
unsigned long constant14;
unsigned long constant15;
unsigned long constant16;
unsigned long constant17;
- unsigned long constant18;
- unsigned long constant19;
sqInt constant2;
- unsigned long constant20;
- sqInt constant3;
- sqInt constant4;
+ unsigned long constant3;
+ unsigned long constant4;
unsigned long constant5;
unsigned long constant6;
unsigned long constant7;
@@ -3203,7 +3231,7 @@
AbstractInstruction *jumpTarget8;
AbstractInstruction *jumpTarget9;
sqInt offset;
- unsigned long offset1;
+ sqInt offset1;
sqInt offset10;
sqInt offset11;
sqInt offset12;
@@ -3221,12 +3249,12 @@
sqInt offset23;
sqInt offset24;
unsigned long offset25;
- unsigned long offset26;
- unsigned long offset27;
- unsigned long offset28;
- unsigned long offset29;
+ sqInt offset26;
+ sqInt offset27;
+ sqInt offset28;
+ sqInt offset29;
sqInt offset3;
- unsigned long offset30;
+ sqInt offset30;
sqInt offset4;
sqInt offset5;
sqInt offset6;
@@ -3336,10 +3364,11 @@
long val3;
long val4;
long val5;
- long word;
- long word1;
+ sqInt word;
+ sqInt word1;
+ long word2;
- if (!((conditionOrNil()) == null)) {
+ if (!(((self_in_dispatchConcretize->conditionOrNil)) == null)) {
concretizeConditionalInstruction(self_in_dispatchConcretize);
return;
}
@@ -3385,22 +3414,25 @@
((self_in_dispatchConcretize->machineCodeSize) = 4);
return;
- case LDMFD:
- concretizeLDMFD();
+ case SMULL:
+ concretizeSMULL(self_in_dispatchConcretize);
return;
- case STMFD:
- concretizeSTMFD();
+ case CMPSMULL:
+ concretizeCMPSMULL(self_in_dispatchConcretize);
return;
- case SMULL:
- concretizeSMULL(self_in_dispatchConcretize);
+ case MSR:
+ concretizeMSR(self_in_dispatchConcretize);
return;
case BICCqR:
/* begin concretizeDataOperationCqR: */
val2 = ((self_in_dispatchConcretize->operands))[0];
rn = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+
+ /* Extra note - if ever a version of this code wants to NOT set the Set flag - Cmp must always have it set or it will pretend to be a SMALALBT and Very Bad Things might happen */
+
rd = (((self_in_dispatchConcretize->opcode)) == CmpOpcode
? 0
: rn);
@@ -3437,36 +3469,36 @@
/* MVN temp, #0, making 0xffffffff */
/* begin machineCodeAt:put: */
- aWord64 = mvnimmror(self_in_dispatchConcretize, ConcreteIPReg, 0, 0);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord64;
+ aWord62 = mvnimmror(self_in_dispatchConcretize, ConcreteIPReg, 0, 0);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord62;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord122 = dataOpTyperdrnrmlsr(self_in_dispatchConcretize, BicOpcode, rd, rn, ConcreteIPReg, 32 - hb2);
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = aWord122;
+ aWord124 = dataOpTyperdrnrmlsr(self_in_dispatchConcretize, BicOpcode, rd, rn, ConcreteIPReg, 32 - hb2);
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = aWord124;
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
}
}
/* begin concretizeDataOperationCwR: */
- constant17 = ((self_in_dispatchConcretize->operands))[0];
+ constant14 = ((self_in_dispatchConcretize->operands))[0];
rn21 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd21 = rn21;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord80 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant17) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord80;
+ aWord78 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant14) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord78;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord138 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant17) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord138;
+ aWord140 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant14) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord140;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord230 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant17) >> 8) & 0xFF, 24);
+ aWord230 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant14) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord230;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord327 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant17 & 0xFF, 0);
+ aWord327 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant14 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord327;
self_in_dispatchConcretize;
instrOffset24 = 16;
@@ -3506,19 +3538,19 @@
jumpTarget = jumpTarget1;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord23 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget) >> 24) & 0xFF, 8);
+ aWord23 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget))) >> 24) & 0xFF, 8);
((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord23;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord110 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget) >> 16) & 0xFF, 16);
+ aWord110 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget))) >> 16) & 0xFF, 16);
((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord110;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord24 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget) >> 8) & 0xFF, 24);
+ aWord24 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget))) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord24;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord33 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, jumpTarget & 0xFF, 0);
+ aWord33 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget)) & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord33;
self_in_dispatchConcretize;
instrOffset1 = 16;
@@ -3552,19 +3584,19 @@
jumpTarget2 = jumpTarget11;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord25 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget2) >> 24) & 0xFF, 8);
+ aWord25 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget2))) >> 24) & 0xFF, 8);
((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord25;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord111 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget2) >> 16) & 0xFF, 16);
+ aWord111 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget2))) >> 16) & 0xFF, 16);
((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord111;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord26 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget2) >> 8) & 0xFF, 24);
+ aWord26 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) (((usqInt) jumpTarget2))) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord26;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord34 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, jumpTarget2 & 0xFF, 0);
+ aWord34 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) jumpTarget2)) & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord34;
self_in_dispatchConcretize;
instrOffset2 = 16;
@@ -4090,24 +4122,24 @@
}
}
/* begin concretizeDataOperationCwR: */
- constant5 = ((self_in_dispatchConcretize->operands))[0];
+ constant3 = ((self_in_dispatchConcretize->operands))[0];
rn1 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd1 = rn1;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord65 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord65;
+ aWord63 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant3) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord63;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord123 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord123;
+ aWord125 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant3) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord125;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord218 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 8) & 0xFF, 24);
+ aWord218 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant3) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord218;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord315 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant5 & 0xFF, 0);
+ aWord315 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant3 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord315;
self_in_dispatchConcretize;
instrOffset12 = 16;
@@ -4124,24 +4156,24 @@
case AddCwR:
/* begin concretizeDataOperationCwR: */
- constant6 = ((self_in_dispatchConcretize->operands))[0];
+ constant4 = ((self_in_dispatchConcretize->operands))[0];
rn2 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd2 = rn2;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord66 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord66;
+ aWord64 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant4) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord64;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord124 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord124;
+ aWord126 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant4) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord126;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord219 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 8) & 0xFF, 24);
+ aWord219 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant4) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord219;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord316 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant6 & 0xFF, 0);
+ aWord316 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant4 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord316;
self_in_dispatchConcretize;
instrOffset13 = 16;
@@ -4255,24 +4287,24 @@
}
else {
/* begin concretizeDataOperationCwR: */
- constant7 = ((self_in_dispatchConcretize->operands))[0];
+ constant5 = ((self_in_dispatchConcretize->operands))[0];
rn4 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd4 = rn4;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord67 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord67;
+ aWord65 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord65;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord125 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord125;
+ aWord127 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord127;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord220 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 8) & 0xFF, 24);
+ aWord220 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant5) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord220;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord317 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant7 & 0xFF, 0);
+ aWord317 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant5 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord317;
self_in_dispatchConcretize;
instrOffset14 = 16;
@@ -4371,24 +4403,24 @@
}
else {
/* begin concretizeDataOperationCwR: */
- constant8 = ((self_in_dispatchConcretize->operands))[0];
+ constant6 = ((self_in_dispatchConcretize->operands))[0];
rn5 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd5 = rn5;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord68 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant8) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord68;
+ aWord66 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord66;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord126 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant8) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord126;
+ aWord128 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord128;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord221 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant8) >> 8) & 0xFF, 24);
+ aWord221 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant6) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord221;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord318 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant8 & 0xFF, 0);
+ aWord318 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant6 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord318;
self_in_dispatchConcretize;
instrOffset15 = 16;
@@ -4406,24 +4438,24 @@
case AndCwR:
/* begin concretizeDataOperationCwR: */
- constant9 = ((self_in_dispatchConcretize->operands))[0];
+ constant7 = ((self_in_dispatchConcretize->operands))[0];
rn6 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd6 = rn6;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord69 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant9) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord69;
+ aWord67 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord67;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord127 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant9) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord127;
+ aWord129 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord129;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord222 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant9) >> 8) & 0xFF, 24);
+ aWord222 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant7) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord222;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord319 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant9 & 0xFF, 0);
+ aWord319 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant7 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord319;
self_in_dispatchConcretize;
instrOffset16 = 16;
@@ -4448,6 +4480,9 @@
/* begin concretizeDataOperationCqR: */
val3 = ((self_in_dispatchConcretize->operands))[0];
rn8 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
+
+ /* Extra note - if ever a version of this code wants to NOT set the Set flag - Cmp must always have it set or it will pretend to be a SMALALBT and Very Bad Things might happen */
+
rd8 = (((self_in_dispatchConcretize->opcode)) == CmpOpcode
? 0
: rn8);
@@ -4484,36 +4519,36 @@
/* MVN temp, #0, making 0xffffffff */
/* begin machineCodeAt:put: */
- aWord70 = mvnimmror(self_in_dispatchConcretize, ConcreteIPReg, 0, 0);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord70;
+ aWord68 = mvnimmror(self_in_dispatchConcretize, ConcreteIPReg, 0, 0);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord68;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord128 = dataOpTyperdrnrmlsr(self_in_dispatchConcretize, CmpOpcode, rd8, rn8, ConcreteIPReg, 32 - hb3);
- ((self_in_dispatchConcretize->machineCode))[4 / 4] = aWord128;
+ aWord130 = dataOpTyperdrnrmlsr(self_in_dispatchConcretize, CmpOpcode, rd8, rn8, ConcreteIPReg, 32 - hb3);
+ ((self_in_dispatchConcretize->machineCode))[4 / 4] = aWord130;
self_in_dispatchConcretize;
((self_in_dispatchConcretize->machineCodeSize) = 8);
return;
}
}
/* begin concretizeDataOperationCwR: */
- constant18 = ((self_in_dispatchConcretize->operands))[0];
+ constant15 = ((self_in_dispatchConcretize->operands))[0];
rn22 = concreteRegister(self_in_dispatchConcretize, ((self_in_dispatchConcretize->operands))[1]);
rd22 = 0;
/* begin at:moveCw:intoR: */
/* begin machineCodeAt:put: */
- aWord81 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant18) >> 24) & 0xFF, 8);
- ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord81;
+ aWord79 = movimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant15) >> 24) & 0xFF, 8);
+ ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord79;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord139 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant18) >> 16) & 0xFF, 16);
- ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord139;
+ aWord141 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant15) >> 16) & 0xFF, 16);
+ ((self_in_dispatchConcretize->machineCode))[(0 + 4) / 4] = aWord141;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord231 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant18) >> 8) & 0xFF, 24);
+ aWord231 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, (((usqInt) constant15) >> 8) & 0xFF, 24);
((self_in_dispatchConcretize->machineCode))[(0 + 8) / 4] = aWord231;
self_in_dispatchConcretize;
/* begin machineCodeAt:put: */
- aWord328 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant18 & 0xFF, 0);
+ aWord328 = orrimmror(self_in_dispatchConcretize, ConcreteIPReg, constant15 & 0xFF, 0);
((self_in_dispatchConcretize->machineCode))[(0 + 12) / 4] = aWord328;
self_in_dispatchConcretize;
instrOffset25 = 16;
@@ -4528,24 +4563,24 @@
case CmpCwR:
/* begin concretizeDataOperationCwR: */
- constant10 = ((self_in_dispatchConcretize->operands))[0];
@@ Diff output truncated at 50000 characters. @@
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