[Vm-dev] a question about building ARM support code in processors

[Robert Withers]

On 10/18/2015 12:06 PM, Tim Olson wrote:
>
>
> On Oct 18, 2015, at 8:41 AM, Robert Withers <robert.w.withers at gmail.com> wrote:
>
>> Thank you, Tim! That fixed the issue and I now have a libsim.a.
>>
>> I have a 64-bit machine and I installed 32-bit ubuntu. I'm sad about that and happy about this.
>>
>> I am rebuilding the VM to see if the ARM plugin builds...which it did and I have that plugin.
>>
>> Would you know the script to fire off an ARM simulation?
>
> check the README in Cog/image, and use buildspurtrunkvmmakerimage.sh and buildspurtrunkreaderimage.sh to build the two spur images.  Then run your new VM on the SpurVMMaker.image.  In the image are a bunch of squeak workspaces.  Find the one titled “VM Simulation Workspace”.  About 7 lines down in that workspace are two commented-out choices: “ISA ARMv5” and “ISA IA32”.

Yes, thanks very much, this is done. I'm running the spur image on my 
generated and built VM, with Bochs and ARM plugin support and plugins 
built externally.

> Start by uncommenting the ISA IA32 (remove quotes), then select everything from the beginning of the workspace to the line “cos openAsMorph; run)” and DoIt.  This will open up a simulation (running the x86 interpreter) on the “spurtrunkreader.image” image.  This runs for a little while for me before popping up an error message “Error: non-float was stored”.  I temporarily got around that by clicking on Debug for the floatAt: and commenting out the “self error…” line, then doing a restart then proceed.  Eventually you will get to a point where it will pop up a requester box labeled “Input please!”, which shows that the simulated image is running correctly.

Oh, right, those are commented out. I ran the reader image a bit, in the 
simulator, and it crashed before the display had loaded. I'm not 
criticizing, that's awesome! Get it to work, get it to work right, get 
it to work fast or something like that. It's got latitude as attitude.

I still saw those comments as strings: I may only plead residual 
lingering cognitive distortions from the land of curly braces. Square 
brackets are subtle in their powers and it comes down to northern or 
southern style shaolin. And now I am just getting silly.

>
> You can then try running with the ARM simulator instead of the IA32 simulator by uncommenting it and commenting the ISA IA32 back again.  However, you won’t get as far, as there are still problems with ARM simulation and Cog ARM code generation.


How could I help with the simulation?

Thank you,
Robert

>
> 	— tim
>