[Vm-dev] VM Maker: VMMaker.oscog-cb.1920.mcz
Clément Bera
bera.clement at gmail.com
Mon Aug 29 09:34:19 UTC 2016
I've just realized in the commit I forgot to revert the cogSpur VM
configuration. It is now compiled with both SqueakV3PlusClosures and
SistaV1 bytecode set, instead of only V3PlusClosures. Everything is
backward compatible.
Tell me if I should revert that in the next commit.
On Mon, Aug 29, 2016 at 11:17 AM, <commits at source.squeak.org> wrote:
>
> ClementBera uploaded a new version of VMMaker to project VM Maker:
> http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1920.mcz
>
> ==================== Summary ====================
>
> Name: VMMaker.oscog-cb.1920
> Author: cb
> Time: 29 August 2016, 11:17:00.977074 am
> UUID: 060760b1-6719-4e5b-b44d-55922703feda
> Ancestors: VMMaker.oscog-cb.1919
>
> This commit makes a difference between the usage of the sistaV1 bytecode
> set and the Sista VM. It is now possible to compile the VM with the SistaV1
> bytecode set but without the SistaVM option. This way, one can use and
> stabilize:
> - directed super sends
> - full block closures
> without using unsafe operations and traps. I believe we'll migrate to the
> sista runtime in multiple steps, and the first step is to use those
> features and have images compatible with those features without runtime
> optimizations.
>
> The SistaV1 bytecode set allows to use directed super send and full block
> closures. Enabling the bytecode set enables those features.
> (SistaV1BytecodeSet option)
>
> The SistaVM option, combined with SistaCogit, enables the profiling
> counters, the unsafe operations and traps. If disabled, the bytecodes from
> the SistaV1 bytecode set corresponding to traps or unsafe operations are
> considered unknown bytecodes.
>
> All unsafe operations and traps related JIT code is now in SistaCogit.
> Those bytecodes are considered as unknown bytecodes in superclasses.
>
> I've also changed some flag logic, as the flag marking optimized method is
> bit 16 (previously upper literal bit) and not the flag bit.
>
> =============== Diff against VMMaker.oscog-cb.1919 ===============
>
> Item was changed:
> ----- Method: CoInterpreter>>maybeFlagMethodAsInterpreted: (in category
> 'compiled methods') -----
> maybeFlagMethodAsInterpreted: aMethod
> + "The flag bit can be used to flag methods that are interpreted, if
> it has been requested
> - "In the Sista VM the flag bit in the method header is taken to
> identify optimized methods.
> - In other VMs it can be used to flag methods that are interpreted,
> if it has been requested
> from the image header flags."
> + flagInterpretedMethods ifTrue:
> - (SistaVM not and: [flagInterpretedMethods]) ifTrue:
> [| rawHeader realHeader |
> rawHeader := self rawHeaderOf: aMethod.
> realHeader := (self isCogMethodReference: rawHeader)
> ifTrue: [(self
> cCoerceSimple: rawHeader to: #'CogMethod *') methodHeader]
> ifFalse: [rawHeader].
> realHeader := realHeader bitOr: (objectMemory
> integerObjectOf: 1 << MethodHeaderFlagBitPosition).
> (self isCogMethodReference: rawHeader)
> ifTrue: [(self cCoerceSimple: rawHeader to:
> #'CogMethod *') methodHeader: realHeader]
> ifFalse: [objectMemory storePointerUnchecked: 0
> ofObject: aMethod withValue: realHeader]]!
>
> Item was changed:
> ----- Method: CoInterpreter>>setImageHeaderFlagsFrom: (in category
> 'image save/restore') -----
> setImageHeaderFlagsFrom: headerFlags
> "Set the flags that are contained in the 7th long of the image
> header."
> imageHeaderFlags := headerFlags. "so as to preserve unrecognised
> flags."
> fullScreenFlag := headerFlags bitAnd: 1.
> imageFloatsBigEndian := (headerFlags bitAnd: 2) = 0 ifTrue: [1]
> ifFalse: [0].
> flagInterpretedMethods := (headerFlags bitAnd: 8) ~= 0.
> preemptionYields := (headerFlags bitAnd: 16) = 0.
> + newFinalization := (headerFlags bitAnd: 64) ~= 0.!
> - newFinalization := (headerFlags bitAnd: 64) ~= 0.
> -
> - (SistaVM and: [flagInterpretedMethods]) ifTrue:
> - [self print: 'warning, flagInterpretedMethods inoperable
> in Sista VMs.'; cr]!
>
> Item was changed:
> ----- Method: SimpleStackBasedCogit>>genCallPrimitiveBytecode (in
> category 'bytecode generators') -----
> genCallPrimitiveBytecode
> "V3PlusClosures: 139 10001011 iiiiiiii jjjjjjjj Call
> Primitive #iiiiiiii + (jjjjjjjj * 256)
> NewsqueakV4: 249 11111001 iiiiiiii jjjjjjjj Call
> Primitive #iiiiiiii + (jjjjjjjj * 256)
> SistaV1: 248 11111000 iiiiiiii mjjjjjjj
> Call Primitive #iiiiiiii + ( jjjjjjj * 256)
> m=1 means inlined
> primitive, no hard return after execution."
> bytecodePC ~= initialPC ifTrue:
> [^EncounteredUnknownBytecode].
> + byte2 < 128 ifFalse: [^EncounteredUnknownBytecode].
> self assert: (primitiveIndex = (byte1 + (byte2 << 8))
> or: [primitiveIndex = 0 "disabled
> primitives, e.g. stream prims"
> and: [(coInterpreter
> primitiveIndexOf: methodObj) = (byte1 + (byte2 << 8))]]).
> ^0!
>
> Item was added:
> + ----- Method: SimpleStackBasedCogit>>genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode
> (in category 'bytecode generators') -----
> + genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode
> + "SistaV1: * 254 11111110 kkkkkkkk
> jjjjjjjj branch If Not Instance Of Behavior/Array Of
> Behavior kkkkkkkk (+ Extend A * 256, where Extend A >= 0) distance jjjjjjjj
> (+ Extend B * 256, where Extend B >= 0)"
> + "Non supported in non Sista VMs"
> + ^EncounteredUnknownBytecode
> + !
>
> Item was added:
> + ----- Method: SistaCogit>>genBinaryConstOpVarInlinePrimitive: (in
> category 'inline primitive generators') -----
> + genBinaryConstOpVarInlinePrimitive: prim
> + "Const op var version of binary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> + <option: #SistaVM>
> + | ra val untaggedVal adjust |
> + ra := self allocateRegForStackEntryAt: 0.
> + self ssTop popToReg: ra.
> + self ssPop: 1.
> + val := self ssTop constant.
> + self ssPop: 1.
> + untaggedVal := val - objectMemory smallIntegerTag.
> + prim caseOf: {
> + "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> + [0] -> [self AddCq: untaggedVal R: ra].
> + [1] -> [self MoveCq: val R: TempReg.
> + self SubR: ra R: TempReg.
> + objectRepresentation
> genAddSmallIntegerTagsTo: TempReg.
> + self MoveR: TempReg R: ra].
> + [2] -> [objectRepresentation
> genShiftAwaySmallIntegerTagsInScratchReg: ra.
> + self MoveCq: untaggedVal R: TempReg.
> + self MulR: TempReg R: ra.
> + objectRepresentation
> genSetSmallIntegerTagsIn: ra].
> +
> + "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> + [16] -> [ self AndCq: val R: ra ].
> + [17] -> [ self OrCq: val R: ra ].
> + [18] -> [ self XorCw: untaggedVal R: ra. ].
> +
> + "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> + "CmpCqR is SubRCq so everything is reversed, but because
> no CmpRCq things are reversed again and we invert the sense of the jumps."
> + [32] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: ra ].
> + [33] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: ra ].
> + [34] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: ra ].
> + [35] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: ra ].
> + [36] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: ra ].
> + [37] -> [ self CmpCq: val R: ra.
> + self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: ra ].
> +
> + "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> + [64] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> + adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> + adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra. ].
> + self genMoveConstant: val R: TempReg.
> + self MoveXwr: ra R: TempReg R: ra].
> + [65] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> + adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> + self AddCq: adjust R: ra.
> + self genMoveConstant: val R: TempReg.
> + self MoveXbr: ra R: TempReg R: ra.
> + objectRepresentation
> genConvertIntegerToSmallIntegerInReg: ra]
> + }
> + otherwise: [^EncounteredUnknownBytecode].
> + self ssPushRegister: ra.
> + ^0!
>
> Item was added:
> + ----- Method: SistaCogit>>genBinaryInlineComparison:opFalse:destReg:
> (in category 'inline primitive generators') -----
> + genBinaryInlineComparison: opTrue opFalse: opFalse destReg: destReg
> + "Inlined comparison. opTrue = jump for true and opFalse = jump for
> false"
> + <var: #branchDescriptor type: #'BytecodeDescriptor *'>
> + | nextPC branchDescriptor targetBytecodePC postBranchPC |
> +
> + self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch
> :target |
> + branchDescriptor := descr. nextPC := next. postBranchPC :=
> postBranch. targetBytecodePC := target ].
> +
> + (branchDescriptor isBranchTrue or: [branchDescriptor
> isBranchFalse])
> + ifTrue: "This is the path where the inlined comparison is
> followed immediately by a branch"
> + [ (self fixupAt: nextPC - initialPC) notAFixup
> + ifTrue: "The next instruction is dead. we
> can skip it."
> + [deadCode := true.
> + self ensureFixupAt:
> targetBytecodePC - initialPC.
> + self ensureFixupAt: postBranchPC
> - initialPC ]
> + ifFalse:
> + [self ssPushConstant: objectMemory
> trueObject]. "dummy value"
> + self genConditionalBranch: (branchDescriptor
> isBranchTrue ifTrue: [opTrue] ifFalse: [opFalse])
> + operand: (self ensureNonMergeFixupAt:
> targetBytecodePC - initialPC) asUnsignedInteger.
> + deadCode ifFalse: [ self Jump: (self
> ensureNonMergeFixupAt: postBranchPC - initialPC) ] ]
> + ifFalse: "This is the path where the inlined comparison is
> *not* followed immediately by a branch"
> + [| condJump jump |
> + condJump := self genConditionalBranch: opTrue
> operand: 0.
> + self genMoveFalseR: destReg.
> + jump := self Jump: 0.
> + condJump jmpTarget: (self genMoveTrueR: destReg).
> + jump jmpTarget: self Label].
> + ^ 0!
>
> Item was added:
> + ----- Method: SistaCogit>>genBinaryVarOpConstInlinePrimitive: (in
> category 'inline primitive generators') -----
> + genBinaryVarOpConstInlinePrimitive: prim
> + "Var op const version of inline binary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> + <option: #SistaVM>
> + | rr val untaggedVal |
> + val := self ssTop constant.
> + self ssPop: 1.
> + rr := self allocateRegForStackEntryAt: 0.
> + self ssTop popToReg: rr.
> + self ssPop: 1.
> + untaggedVal := val - objectMemory smallIntegerTag.
> + prim caseOf: {
> + "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> + [0] -> [self AddCq: untaggedVal R: rr].
> + [1] -> [self SubCq: untaggedVal R: rr ].
> + [2] -> [self flag: 'could use MulCq:R'.
> + objectRepresentation
> genShiftAwaySmallIntegerTagsInScratchReg: rr.
> + self MoveCq: untaggedVal R: TempReg.
> + self MulR: TempReg R: rr.
> + objectRepresentation
> genSetSmallIntegerTagsIn: rr].
> +
> + "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> + [16] -> [ self AndCq: val R: rr ].
> + [17] -> [ self OrCq: val R: rr ].
> + [18] -> [ self flag: 'could use XorCq:'.
> + self XorCw: untaggedVal R: rr. ].
> +
> + "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> + "CmpCqR is SubRCq so everything is reversed."
> + [32] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: rr ].
> + [33] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: rr ].
> + [34] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: rr ].
> + [35] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: rr ].
> + [36] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: rr ].
> + [37] -> [ self CmpCq: val R: rr.
> + self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: rr ].
> +
> + "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> + [64] -> [objectRepresentation genLoadSlot: (objectMemory
> integerValueOf: val) - 1 sourceReg: rr destReg: rr].
> + [65] -> [self MoveCq: (objectMemory integerValueOf: val) +
> objectMemory baseHeaderSize - 1 R: TempReg.
> + self MoveXbr: TempReg R: rr R: rr.
> + objectRepresentation
> genConvertIntegerToSmallIntegerInReg: rr]
> +
> + }
> + otherwise: [^EncounteredUnknownBytecode].
> + self ssPushRegister: rr.
> + ^0!
>
> Item was added:
> + ----- Method: SistaCogit>>genBinaryVarOpVarInlinePrimitive: (in
> category 'inline primitive generators') -----
> + genBinaryVarOpVarInlinePrimitive: prim
> + "Var op var version of binary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> + <option: #SistaVM>
> + | ra rr adjust |
> + self allocateRegForStackTopTwoEntriesInto: [:rTop :rNext | ra :=
> rTop. rr := rNext ].
> + self ssTop popToReg: ra.
> + self ssPop: 1.
> + self ssTop popToReg: rr.
> + self ssPop: 1.
> + prim caseOf: {
> + "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> + [0] -> [objectRepresentation
> genRemoveSmallIntegerTagsInScratchReg: ra.
> + self AddR: ra R: rr].
> + [1] -> [self SubR: ra R: rr.
> + objectRepresentation
> genAddSmallIntegerTagsTo: rr].
> + [2] -> [self genShiftAwaySmallIntegerTagsInScratchReg:
> rr.
> + self genRemoveSmallIntegerTagsInScratchReg:
> ra.
> + self MulR: ra R: rr.
> + self genSetSmallIntegerTagsIn: rr].
> +
> + "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> + [16] -> [ self AndR: ra R: rr ].
> + [17] -> [ self OrR: ra R: rr ].
> + [18] -> [objectRepresentation
> genRemoveSmallIntegerTagsInScratchReg: ra.
> + self XorR: ra R: rr. ].
> +
> +
> + "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> + "CmpCqR is SubRCq so everything is reversed."
> + [32] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: rr ].
> + [33] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: rr ].
> + [34] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: rr ].
> + [35] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: rr ].
> + [36] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: rr ].
> + [37] -> [ self CmpR: ra R: rr.
> + self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: rr ].
> +
> + "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> + [64] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> + adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> + adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra. ].
> + self MoveXwr: ra R: rr R: rr ].
> + [65] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> + adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> + self AddCq: adjust R: ra.
> + self MoveXbr: ra R: rr R: rr.
> + objectRepresentation
> genConvertIntegerToSmallIntegerInReg: rr]
> +
> + }
> + otherwise: [^EncounteredUnknownBytecode].
> + self ssPushRegister: rr.
> + ^0!
>
> Item was added:
> + ----- Method: SistaCogit>>genCallPrimitiveBytecode (in category
> 'bytecode generators') -----
> + genCallPrimitiveBytecode
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> inlinePrimitiveBytecode:"
> + | prim |
> + byte2 < 128 ifTrue:
> + [^bytecodePC = initialPC
> + ifTrue: [0]
> + ifFalse: [EncounteredUnknownBytecode]].
> + prim := byte2 - 128 << 8 + byte1.
> +
> + prim < 1000 ifTrue:
> + [^self genNullaryInlinePrimitive: prim].
> +
> + prim < 2000 ifTrue:
> + [^self genUnaryInlinePrimitive: prim - 1000].
> +
> + prim < 3000 ifTrue:
> + [self ssTop type = SSConstant ifTrue:
> + [^self genBinaryVarOpConstInlinePrimitive: prim -
> 2000].
> + (self ssValue: 1) type = SSConstant ifTrue:
> + [^self genBinaryConstOpVarInlinePrimitive: prim -
> 2000].
> + ^self genBinaryVarOpVarInlinePrimitive: prim - 2000].
> +
> + prim < 4000 ifTrue:
> + [^self genTrinaryInlinePrimitive: prim - 3000].
> +
> + ^EncounteredUnknownBytecode!
>
> Item was added:
> + ----- Method: SistaCogit>>genNullaryInlinePrimitive: (in category
> 'inline primitive generators') -----
> + genNullaryInlinePrimitive: prim
> + "Nullary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> nullaryInlinePrimitive:"
> +
> + <option: #SistaVM>
> + ^EncounteredUnknownBytecode!
>
> Item was added:
> + ----- Method: SistaCogit>>genTrinaryInlinePrimitive: (in category
> 'inline primitive generators') -----
> + genTrinaryInlinePrimitive: prim
> + "Unary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> trinaryInlinePrimitive:"
> + | ra1 ra2 rr adjust needsStoreCheck |
> + "The store check requires rr to be ReceiverResultReg"
> + needsStoreCheck := (objectRepresentation isUnannotatableConstant:
> self ssTop) not.
> + self
> + allocateRegForStackTopThreeEntriesInto: [:rTop :rNext
> :rThird | ra2 := rTop. ra1 := rNext. rr := rThird ]
> + thirdIsReceiver: (prim = 0 and: [ needsStoreCheck ]).
> + self assert: (rr ~= ra1 and: [rr ~= ra2 and: [ra1 ~= ra2]]).
> + self ssTop popToReg: ra2.
> + self ssPop: 1.
> + self ssTop popToReg: ra1.
> + self ssPop: 1.
> + self ssTop popToReg: rr.
> + self ssPop: 1.
> + objectRepresentation genConvertSmallIntegerToIntegerInReg: ra1.
> + "Now: ra is the variable object, rr is long, TempReg holds the
> value to store."
> + self flag: #TODO. "This is not really working as the immutability
> and store check needs to be present. "
> + prim caseOf: {
> + "0 - 1 pointerAt:put: and byteAt:Put:"
> + [0] -> [ adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> + adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra1. ].
> + self MoveR: ra2 Xwr: ra1 R: rr.
> + "I added needsStoreCheck so if you
> initialize an array with a Smi such as 0 or a boolean you don't need the
> store check"
> + needsStoreCheck ifTrue:
> + [ self assert: needsFrame.
> + objectRepresentation
> genStoreCheckReceiverReg: rr valueReg: ra2 scratchReg: TempReg inFrame:
> true] ].
> + [1] -> [ objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra2.
> + adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> + self AddCq: adjust R: ra1.
> + self MoveR: ra2 Xbr: ra1 R: rr.
> + objectRepresentation
> genConvertIntegerToSmallIntegerInReg: ra2. ]
> + }
> + otherwise: [^EncounteredUnknownBytecode].
> + self ssPushRegister: ra2.
> + ^0!
>
> Item was added:
> + ----- Method: SistaCogit>>genUnaryInlinePrimitive: (in category 'inline
> primitive generators') -----
> + genUnaryInlinePrimitive: prim
> + "Unary inline primitives."
> + "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> + See EncoderForSistaV1's class comment and StackInterpreter>>#
> unaryInlinePrimitive:"
> + | rcvrReg resultReg |
> + rcvrReg := self allocateRegForStackEntryAt: 0.
> + resultReg := self allocateRegNotConflictingWith: (self
> registerMaskFor: rcvrReg).
> + prim
> + caseOf: {
> + "00 unchecked class"
> + [1] -> "01 unchecked pointer numSlots"
> + [self ssTop popToReg: rcvrReg.
> + self ssPop: 1.
> + objectRepresentation
> + genGetNumSlotsOf: rcvrReg into:
> resultReg;
> + genConvertIntegerToSmallIntegerInReg:
> resultReg].
> + "02 unchecked pointer
> basicSize"
> + [3] -> "03 unchecked byte numBytes"
> + [objectRepresentation
> + genGetNumBytesOf: rcvrReg into:
> resultReg;
> + genConvertIntegerToSmallIntegerInReg:
> resultReg].
> + "04 unchecked
> short16Type format numShorts"
> + "05 unchecked
> word32Type format numWords"
> + "06 unchecked
> doubleWord64Type format numDoubleWords"
> + [11] -> "11 unchecked fixed pointer
> basicNew"
> + [self ssTop type ~= SSConstant ifTrue:
> + [^EncounteredUnknownBytecode].
> + (objectRepresentation
> + genGetInstanceOf: self ssTop
> constant
> + into: resultReg
> + initializingIf:
> self extBSpecifiesInitializeInstance) ~= 0 ifTrue:
> + [^ShouldNotJIT]. "e.g. bad class"
> + self ssPop: 1]
> + }
> + otherwise:
> + [^EncounteredUnknownBytecode].
> + extB := 0.
> + self ssPushRegister: resultReg.
> + ^0!
>
> Item was changed:
> ----- Method: StackInterpreter>>directedSuperclassSend (in category
> 'send bytecodes') -----
> directedSuperclassSend
> "Send a message to self, starting lookup with the superclass of
> the class on top of stack."
> "Assume: messageSelector and argumentCount have been set, and that
> the receiver and arguments have been pushed onto the stack,"
> "Note: This method is inlined into the interpreter dispatch loop."
> <sharedCodeInCase: #extSendSuperBytecode>
> + <option: #BytecodeSetHasDirectedSuperSend>
> - <option: #SistaVM>
> | class superclass |
> class := self internalPopStack.
> (objectMemory isForwarded: class) ifTrue:
> [class := objectMemory followForwarded: class].
> superclass := self superclassOf: class.
> "classTagForClass: uses ensureBehaviorHash:"
> lkupClassTag := objectMemory classTagForClass: superclass.
> "To maintain the invariant that all receivers are unforwarded we
> need an explicit
> read barrier in the super send cases. Even though we always
> follow receivers
> on become e.g. super doSomethingWith: (self become: other)
> forwards the receiver
> self pushed on the stack."
> self ensureReceiverUnforwarded.
> self assert: lkupClassTag ~= objectMemory nilObject.
> self commonSendOrdinary!
>
> Item was changed:
> ----- Method: StackInterpreter>>extJumpIfNotInstanceOfBehaviorsOrPopBytecode
> (in category 'sista bytecodes') -----
> extJumpIfNotInstanceOfBehaviorsOrPopBytecode
> "254 11111110 kkkkkkkk jjjjjjjj
> branch If Not Instance Of Behavior/Array Of Behavior kkkkkkkk (+
> Extend A * 256, where Extend A >= 0) distance jjjjjjjj (+ Extend B * 256,
> where Extend B >= 0)"
> | tosClassTag literal distance |
> + SistaVM ifFalse: [^self respondToUnknownBytecode].
> tosClassTag := objectMemory fetchClassTagOf: self internalStackTop.
> literal := self literal: extA << 8 + self fetchByte.
> distance := extB << 8 + self fetchByte.
> extA := 0.
> extB := 0.
> (objectMemory isArrayNonImm: literal)
> ifTrue:
> [0 to: (objectMemory numSlotsOf: literal)
> asInteger - 1 do: [:i |
> tosClassTag = (objectMemory
> rawClassTagForClass: (objectMemory fetchPointer: i ofObject: literal))
> ifTrue:
> [ self internalPopStack.
> ^ self fetchNextBytecode ]
> ].
> localIP := localIP + distance.
> ^ self fetchNextBytecode]
> ifFalse:
> [tosClassTag ~= (objectMemory rawClassTagForClass:
> literal) ifTrue:
> [localIP := localIP + distance.
> ^ self fetchNextBytecode]].
> self internalPopStack.
> self fetchNextBytecode!
>
> Item was changed:
> ----- Method: StackInterpreter>>extSendSuperBytecode (in category 'send
> bytecodes') -----
> extSendSuperBytecode
> "239 11101111 i i i i i j j j
> ExtendB < 64
> ifTrue: [Send To Superclass Literal Selector
> #iiiii (+ Extend A * 32) with jjj (+ Extend B * 8) Arguments]
> ifFalse: [Send To Superclass of Stacked Class
> Literal Selector #iiiii (+ Extend A * 32) with jjj (+ (Extend B bitAnd: 63)
> * 8) Arguments]"
> | byte |
> byte := self fetchByte.
> messageSelector := self literal: (byte >> 3) + (extA << 5).
> extA := 0.
> + BytecodeSetHasDirectedSuperSend ifTrue:
> - SistaVM ifTrue:
> [extB >= 64 ifTrue:
> [argumentCount := (byte bitAnd: 7) + (extB - 64 <<
> 3).
> extB := 0.
> ^self directedSuperclassSend]].
> argumentCount := (byte bitAnd: 7) + (extB << 3).
> extB := 0.
> self superclassSend!
>
> Item was changed:
> ----- Method: StackInterpreter>>unconditionnalTrapBytecode (in category
> 'sista bytecodes') -----
> unconditionnalTrapBytecode
> "SistaV1: * 217 Trap"
> + SistaVM
> + ifTrue: [^self respondToSistaTrap]
> + ifFalse: [^self respondToUnknownBytecode]!
> - ^ self respondToSistaTrap!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>
> genBinaryConstOpVarInlinePrimitive: (in category 'inline primitive
> generators') -----
> - genBinaryConstOpVarInlinePrimitive: prim
> - "Const op var version of binary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> - <option: #SistaVM>
> - | ra val untaggedVal adjust |
> - ra := self allocateRegForStackEntryAt: 0.
> - self ssTop popToReg: ra.
> - self ssPop: 1.
> - val := self ssTop constant.
> - self ssPop: 1.
> - untaggedVal := val - objectMemory smallIntegerTag.
> - prim caseOf: {
> - "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> - [0] -> [self AddCq: untaggedVal R: ra].
> - [1] -> [self MoveCq: val R: TempReg.
> - self SubR: ra R: TempReg.
> - objectRepresentation
> genAddSmallIntegerTagsTo: TempReg.
> - self MoveR: TempReg R: ra].
> - [2] -> [objectRepresentation
> genShiftAwaySmallIntegerTagsInScratchReg: ra.
> - self MoveCq: untaggedVal R: TempReg.
> - self MulR: TempReg R: ra.
> - objectRepresentation
> genSetSmallIntegerTagsIn: ra].
> -
> - "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> - [16] -> [ self AndCq: val R: ra ].
> - [17] -> [ self OrCq: val R: ra ].
> - [18] -> [ self XorCw: untaggedVal R: ra. ].
> -
> - "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> - "CmpCqR is SubRCq so everything is reversed, but because
> no CmpRCq things are reversed again and we invert the sense of the jumps."
> - [32] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: ra ].
> - [33] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: ra ].
> - [34] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: ra ].
> - [35] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: ra ].
> - [36] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: ra ].
> - [37] -> [ self CmpCq: val R: ra.
> - self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: ra ].
> -
> - "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> - [64] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> - adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> - adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra. ].
> - self genMoveConstant: val R: TempReg.
> - self MoveXwr: ra R: TempReg R: ra].
> - [65] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> - adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> - self AddCq: adjust R: ra.
> - self genMoveConstant: val R: TempReg.
> - self MoveXbr: ra R: TempReg R: ra.
> - objectRepresentation
> genConvertIntegerToSmallIntegerInReg: ra]
> - }
> - otherwise: [^EncounteredUnknownBytecode].
> - self ssPushRegister: ra.
> - ^0!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>genBinaryInlineComparison:opFalse:destReg:
> (in category 'inline primitive generators') -----
> - genBinaryInlineComparison: opTrue opFalse: opFalse destReg: destReg
> - "Inlined comparison. opTrue = jump for true and opFalse = jump for
> false"
> - <var: #branchDescriptor type: #'BytecodeDescriptor *'>
> - | nextPC branchDescriptor targetBytecodePC postBranchPC |
> -
> - self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch
> :target |
> - branchDescriptor := descr. nextPC := next. postBranchPC :=
> postBranch. targetBytecodePC := target ].
> -
> - (branchDescriptor isBranchTrue or: [branchDescriptor
> isBranchFalse])
> - ifTrue: "This is the path where the inlined comparison is
> followed immediately by a branch"
> - [ (self fixupAt: nextPC - initialPC) notAFixup
> - ifTrue: "The next instruction is dead. we
> can skip it."
> - [deadCode := true.
> - self ensureFixupAt:
> targetBytecodePC - initialPC.
> - self ensureFixupAt: postBranchPC
> - initialPC ]
> - ifFalse:
> - [self ssPushConstant: objectMemory
> trueObject]. "dummy value"
> - self genConditionalBranch: (branchDescriptor
> isBranchTrue ifTrue: [opTrue] ifFalse: [opFalse])
> - operand: (self ensureNonMergeFixupAt:
> targetBytecodePC - initialPC) asUnsignedInteger.
> - deadCode ifFalse: [ self Jump: (self
> ensureNonMergeFixupAt: postBranchPC - initialPC) ] ]
> - ifFalse: "This is the path where the inlined comparison is
> *not* followed immediately by a branch"
> - [| condJump jump |
> - condJump := self genConditionalBranch: opTrue
> operand: 0.
> - self genMoveFalseR: destReg.
> - jump := self Jump: 0.
> - condJump jmpTarget: (self genMoveTrueR: destReg).
> - jump jmpTarget: self Label].
> - ^ 0!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>
> genBinaryVarOpConstInlinePrimitive: (in category 'inline primitive
> generators') -----
> - genBinaryVarOpConstInlinePrimitive: prim
> - "Var op const version of inline binary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> - <option: #SistaVM>
> - | rr val untaggedVal |
> - val := self ssTop constant.
> - self ssPop: 1.
> - rr := self allocateRegForStackEntryAt: 0.
> - self ssTop popToReg: rr.
> - self ssPop: 1.
> - untaggedVal := val - objectMemory smallIntegerTag.
> - prim caseOf: {
> - "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> - [0] -> [self AddCq: untaggedVal R: rr].
> - [1] -> [self SubCq: untaggedVal R: rr ].
> - [2] -> [self flag: 'could use MulCq:R'.
> - objectRepresentation
> genShiftAwaySmallIntegerTagsInScratchReg: rr.
> - self MoveCq: untaggedVal R: TempReg.
> - self MulR: TempReg R: rr.
> - objectRepresentation
> genSetSmallIntegerTagsIn: rr].
> -
> - "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> - [16] -> [ self AndCq: val R: rr ].
> - [17] -> [ self OrCq: val R: rr ].
> - [18] -> [ self flag: 'could use XorCq:'.
> - self XorCw: untaggedVal R: rr. ].
> -
> - "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> - "CmpCqR is SubRCq so everything is reversed."
> - [32] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: rr ].
> - [33] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: rr ].
> - [34] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: rr ].
> - [35] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: rr ].
> - [36] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: rr ].
> - [37] -> [ self CmpCq: val R: rr.
> - self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: rr ].
> -
> - "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> - [64] -> [objectRepresentation genLoadSlot: (objectMemory
> integerValueOf: val) - 1 sourceReg: rr destReg: rr].
> - [65] -> [self MoveCq: (objectMemory integerValueOf: val) +
> objectMemory baseHeaderSize - 1 R: TempReg.
> - self MoveXbr: TempReg R: rr R: rr.
> - objectRepresentation
> genConvertIntegerToSmallIntegerInReg: rr]
> -
> - }
> - otherwise: [^EncounteredUnknownBytecode].
> - self ssPushRegister: rr.
> - ^0!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>
> genBinaryVarOpVarInlinePrimitive: (in category 'inline primitive
> generators') -----
> - genBinaryVarOpVarInlinePrimitive: prim
> - "Var op var version of binary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> binaryInlinePrimitive:"
> - <option: #SistaVM>
> - | ra rr adjust |
> - self allocateRegForStackTopTwoEntriesInto: [:rTop :rNext | ra :=
> rTop. rr := rNext ].
> - self ssTop popToReg: ra.
> - self ssPop: 1.
> - self ssTop popToReg: rr.
> - self ssPop: 1.
> - prim caseOf: {
> - "0 through 6, +, -, *, /, //, \\, quo:, SmallInteger op
> SmallInteger => SmallInteger, no overflow"
> - [0] -> [objectRepresentation
> genRemoveSmallIntegerTagsInScratchReg: ra.
> - self AddR: ra R: rr].
> - [1] -> [self SubR: ra R: rr.
> - objectRepresentation
> genAddSmallIntegerTagsTo: rr].
> - [2] -> [self genShiftAwaySmallIntegerTagsInScratchReg:
> rr.
> - self genRemoveSmallIntegerTagsInScratchReg:
> ra.
> - self MulR: ra R: rr.
> - self genSetSmallIntegerTagsIn: rr].
> -
> - "2016 through 2019, bitAnd:, bitOr:, bitXor, bitShift:,
> SmallInteger op SmallInteger => SmallInteger, no overflow"
> - [16] -> [ self AndR: ra R: rr ].
> - [17] -> [ self OrR: ra R: rr ].
> - [18] -> [objectRepresentation
> genRemoveSmallIntegerTagsInScratchReg: ra.
> - self XorR: ra R: rr. ].
> -
> -
> - "2032 through 2037, >, <, >=, <=. =, ~=, SmallInteger op
> SmallInteger => Boolean (flags?? then in jump bytecodes if ssTop is a flags
> value, just generate the instruction!!!!)"
> - "CmpCqR is SubRCq so everything is reversed."
> - [32] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison:
> JumpGreater opFalse: JumpLessOrEqual destReg: rr ].
> - [33] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison: JumpLess
> opFalse: JumpGreaterOrEqual destReg: rr ].
> - [34] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison:
> JumpGreaterOrEqual opFalse: JumpLess destReg: rr ].
> - [35] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison:
> JumpLessOrEqual opFalse: JumpGreater destReg: rr ].
> - [36] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison: JumpZero
> opFalse: JumpNonZero destReg: rr ].
> - [37] -> [ self CmpR: ra R: rr.
> - self genBinaryInlineComparison:
> JumpNonZero opFalse: JumpZero destReg: rr ].
> -
> - "2064 through 2068, Pointer Object>>at:, Byte
> Object>>at:, Short16 Word Object>>at: LongWord32 Object>>at: Quad64Word
> Object>>at:. obj op 0-rel SmallInteger => oop"
> - [64] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> - adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> - adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra. ].
> - self MoveXwr: ra R: rr R: rr ].
> - [65] -> [objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra.
> - adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> - self AddCq: adjust R: ra.
> - self MoveXbr: ra R: rr R: rr.
> - objectRepresentation
> genConvertIntegerToSmallIntegerInReg: rr]
> -
> - }
> - otherwise: [^EncounteredUnknownBytecode].
> - self ssPushRegister: rr.
> - ^0!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>genCallPrimitiveBytecode (in
> category 'bytecode generators') -----
> - genCallPrimitiveBytecode
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> inlinePrimitiveBytecode:"
> - | prim |
> - byte2 < 128 ifTrue:
> - [^bytecodePC = initialPC
> - ifTrue: [0]
> - ifFalse: [EncounteredUnknownBytecode]].
> - prim := byte2 - 128 << 8 + byte1.
> -
> - self cppIf: SistaVM
> - ifTrue:
> - [prim < 1000 ifTrue:
> - [^self genNullaryInlinePrimitive: prim].
> -
> - prim < 2000 ifTrue:
> - [^self genUnaryInlinePrimitive: prim -
> 1000].
> -
> - prim < 3000 ifTrue:
> - [self ssTop type = SSConstant ifTrue:
> - [^self
> genBinaryVarOpConstInlinePrimitive: prim - 2000].
> - (self ssValue: 1) type = SSConstant
> ifTrue:
> - [^self
> genBinaryConstOpVarInlinePrimitive: prim - 2000].
> - ^self genBinaryVarOpVarInlinePrimitive:
> prim - 2000].
> -
> - prim < 4000 ifTrue:
> - [^self genTrinaryInlinePrimitive: prim -
> 3000]].
> -
> - ^EncounteredUnknownBytecode!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>genNullaryInlinePrimitive:
> (in category 'inline primitive generators') -----
> - genNullaryInlinePrimitive: prim
> - "Nullary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> nullaryInlinePrimitive:"
> -
> - <option: #SistaVM>
> - ^EncounteredUnknownBytecode!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>genTrinaryInlinePrimitive:
> (in category 'inline primitive generators') -----
> - genTrinaryInlinePrimitive: prim
> - "Unary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> trinaryInlinePrimitive:"
> - <option: #SistaVM>
> - | ra1 ra2 rr adjust needsStoreCheck |
> - "The store check requires rr to be ReceiverResultReg"
> - needsStoreCheck := (objectRepresentation isUnannotatableConstant:
> self ssTop) not.
> - self
> - allocateRegForStackTopThreeEntriesInto: [:rTop :rNext
> :rThird | ra2 := rTop. ra1 := rNext. rr := rThird ]
> - thirdIsReceiver: (prim = 0 and: [ needsStoreCheck ]).
> - self assert: (rr ~= ra1 and: [rr ~= ra2 and: [ra1 ~= ra2]]).
> - self ssTop popToReg: ra2.
> - self ssPop: 1.
> - self ssTop popToReg: ra1.
> - self ssPop: 1.
> - self ssTop popToReg: rr.
> - self ssPop: 1.
> - objectRepresentation genConvertSmallIntegerToIntegerInReg: ra1.
> - "Now: ra is the variable object, rr is long, TempReg holds the
> value to store."
> - self flag: #TODO. "This is not really working as the immutability
> and store check needs to be present. "
> - prim caseOf: {
> - "0 - 1 pointerAt:put: and byteAt:Put:"
> - [0] -> [ adjust := (objectMemory baseHeaderSize >>
> objectMemory shiftForWord) - 1. "shift by baseHeaderSize and then move from
> 1 relative to zero relative"
> - adjust ~= 0 ifTrue: [ self AddCq: adjust
> R: ra1. ].
> - self MoveR: ra2 Xwr: ra1 R: rr.
> - "I added needsStoreCheck so if you
> initialize an array with a Smi such as 0 or a boolean you don't need the
> store check"
> - needsStoreCheck ifTrue:
> - [ self assert: needsFrame.
> - objectRepresentation
> genStoreCheckReceiverReg: rr valueReg: ra2 scratchReg: TempReg inFrame:
> true] ].
> - [1] -> [ objectRepresentation
> genConvertSmallIntegerToIntegerInReg: ra2.
> - adjust := objectMemory baseHeaderSize - 1.
> "shift by baseHeaderSize and then move from 1 relative to zero relative"
> - self AddCq: adjust R: ra1.
> - self MoveR: ra2 Xbr: ra1 R: rr.
> - objectRepresentation
> genConvertIntegerToSmallIntegerInReg: ra2. ]
> - }
> - otherwise: [^EncounteredUnknownBytecode].
> - self ssPushRegister: ra2.
> - ^0!
>
> Item was removed:
> - ----- Method: StackToRegisterMappingCogit>>genUnaryInlinePrimitive: (in
> category 'inline primitive generators') -----
> - genUnaryInlinePrimitive: prim
> - "Unary inline primitives."
> - "SistaV1: 248 11111000 iiiiiiii
> mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1
> means inlined primitive, no hard return after execution.
> - See EncoderForSistaV1's class comment and StackInterpreter>>#
> unaryInlinePrimitive:"
> - <option: #SistaVM>
> - | rcvrReg resultReg |
> - rcvrReg := self allocateRegForStackEntryAt: 0.
> - resultReg := self allocateRegNotConflictingWith: (self
> registerMaskFor: rcvrReg).
> - prim
> - caseOf: {
> - "00 unchecked class"
> - [1] -> "01 unchecked pointer numSlots"
> - [self ssTop popToReg: rcvrReg.
> - self ssPop: 1.
> - objectRepresentation
> - genGetNumSlotsOf: rcvrReg into:
> resultReg;
> - genConvertIntegerToSmallIntegerInReg:
> resultReg].
> - "02 unchecked pointer
> basicSize"
> - [3] -> "03 unchecked byte numBytes"
> - [objectRepresentation
> - genGetNumBytesOf: rcvrReg into:
> resultReg;
> - genConvertIntegerToSmallIntegerInReg:
> resultReg].
> - "04 unchecked
> short16Type format numShorts"
> - "05 unchecked
> word32Type format numWords"
> - "06 unchecked
> doubleWord64Type format numDoubleWords"
> - [11] -> "11 unchecked fixed pointer
> basicNew"
> - [self ssTop type ~= SSConstant ifTrue:
> - [^EncounteredUnknownBytecode].
> - (objectRepresentation
> - genGetInstanceOf: self ssTop
> constant
> - into: resultReg
> - initializingIf:
> self extBSpecifiesInitializeInstance) ~= 0 ifTrue:
> - [^ShouldNotJIT]. "e.g. bad class"
> - self ssPop: 1]
> - }
> - otherwise:
> - [^EncounteredUnknownBytecode].
> - extB := 0.
> - self ssPushRegister: resultReg.
> - ^0!
>
> Item was changed:
> ----- Method: VMMaker class>>generateSqueakCogVMWithInterpreterClass:options:
> (in category 'confs-support') -----
> generateSqueakCogVMWithInterpreterClass: interpreterClass options:
> optionsArray
> ^VMMaker
> generate: interpreterClass
> + and: SimpleStackBasedCogit
> - and: StackToRegisterMappingCogit
> with: optionsArray
> to: (FileDirectory default pathFromURI: self sourceTree,
> '/src')
> platformDir: (FileDirectory default pathFromURI: self
> sourceTree, '/platforms')
> including:#()!
>
> Item was changed:
> ----- Method: VMMaker class>>generateSqueakSpurCogVM (in category
> 'configurations') -----
> generateSqueakSpurCogVM
> "No primitives since we can use those for the Cog VM"
> ^VMMaker
> generate: CoInterpreter
> and: StackToRegisterMappingCogit
> + with: #(ObjectMemory Spur32BitCoMemoryManager
> + MULTIPLEBYTECODESETS true
> + bytecodeTableInitializer
> initializeBytecodeTableForSqueakV3PlusClosuresSistaV1Hybrid)
> - with: #(ObjectMemory Spur32BitCoMemoryManager)
> to: (FileDirectory default pathFromURI: self sourceTree,
> '/spursrc')
> platformDir: (FileDirectory default pathFromURI: self
> sourceTree, '/platforms')
> including:#()!
>
>
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