[Vm-dev] VM Maker: Cog-eem.313.mcz

commits at source.squeak.org commits at source.squeak.org
Wed Jan 13 22:22:08 UTC 2016


Eliot Miranda uploaded a new version of Cog to project VM Maker:
http://source.squeak.org/VMMaker/Cog-eem.313.mcz

==================== Summary ====================

Name: Cog-eem.313
Author: eem
Time: 13 January 2016, 2:21:52.902711 pm
UUID: a36caed9-0c90-4b2c-97e8-99aa4ec1df22
Ancestors: Cog-eem.312

Fix MovEbGb exception handling in the x64 processor alien.

Fix SmallFloat64's hash in the 32-to-64-bit Spur bootstrap.

=============== Diff against Cog-eem.312 ===============

Item was changed:
  ----- Method: BochsX64Alien>>handleMovEbGbFailureAt:in:rex: (in category 'error handling') -----
  handleMovEbGbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>"
  	"Convert an execution primitive failure for a byte register write into a ProcessorSimulationTrap signal."
+ 	| modrmByte offset size baseReg srcReg |
- 	| modrmByte offset size |
  	modrmByte := memoryArray byteAt: pc + 3.
  	(modrmByte bitAnd: 16rC0) caseOf: {
  		[16r80 "ModRegRegDisp32"] -> [offset := memoryArray unsignedLongAt: pc + 4 bigEndian: false.
  										 size := 7].
  		[16r40 "ModRegRegDisp8"] -> [offset := memoryArray byteAt: pc + 4.
  										offset > 127 ifTrue: [offset := offset - 256].
+ 										 size := 4].
+ 		[16r0 "ModRegInd"] -> [offset := 0.
+ 								size := 3]}
- 										 size := 4] }
  		otherwise: [self reportPrimitiveFailure].
+ 	srcReg := (modrmByte >> 3 bitAnd: 7) + ((rexByteOrNil bitAnd: 4) bitShift: 1).
+ 	baseReg := (modrmByte bitAnd: 7) + ((rexByteOrNil bitAnd: 1) bitShift: 3).
  	^(ProcessorSimulationTrap
  			pc: pc
  			nextpc: pc + size
+ 			address: (((self perform: (self registerStateGetters at: baseReg + 1))
- 			address: (((self perform: (self registerStateGetters at: (modrmByte bitAnd: 7) + ((rexByteOrNil bitAnd: 1) bitShift: 3) + 1))
  					+ offset)
  						bitAnd: 16rFFFFFFFFFFFFFFFF)
  			type: #write
+ 			accessor: (#(al cl dl bl spl bpl sil dil r8l r9l r10l r11l r12l r13l r14l r15l) at: srcReg + 1))
- 			accessor: (#(al cl dl bl spl bpl sil dil r8l r9l r10l r11l r12l r13l r14l r15l) at: ((modrmByte >> 3 bitAnd: 7) + ((rexByteOrNil bitAnd: 4) bitShift: 1) + 1)))
  		signal!

Item was changed:
  ----- Method: Spur32to64BitBootstrap>>installSmallFloatInClassTable (in category 'bootstrap image') -----
  installSmallFloatInClassTable
+ 	| firstPage smallFloatClass |
- 	| firstPage |
  	firstPage := heap64 fetchPointer: 0 ofObject: heap64 classTableRootObj.
+ 	smallFloatClass := self smallFloatClass.
+ 	self assert: (heap64 hashBitsOf: smallFloatClass) = 0.
  	heap64
  		storePointer: heap64 smallFloatTag
  		ofObject: firstPage
+ 		withValue: smallFloatClass.
+ 	heap64
+ 		setHashBitsOf: smallFloatClass to: heap64 smallFloatTag!
- 		withValue: self smallFloatClass!



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