[Vm-dev] VM Maker: VMMaker.oscog-eem.2770.mcz

commits at source.squeak.org commits at source.squeak.org
Sat Jul 4 19:10:02 UTC 2020

Eliot Miranda uploaded a new version of VMMaker to project VM Maker:

==================== Summary ====================

Name: VMMaker.oscog-eem.2770
Author: eem
Time: 4 July 2020, 12:09:46.919388 pm
UUID: f04f64b9-87bb-49ab-a430-848afd98df9c
Ancestors: VMMaker.oscog-eem.2769

Cogit: Putative support for alternative overflow checking when a processor's intrinsic multiply instruction doesn't check for overflow.

Simulator: Fix a bad error in processor alien error checking which tested the sense of printRegisters and printInstructions wrongly.

=============== Diff against VMMaker.oscog-eem.2769 ===============

Item was added:
+ ----- Method: CogAbstractInstruction>>canMulRRDetectOverflow (in category 'testing') -----
+ canMulRRDetectOverflow
+ 	"Hook for ARMv8 to implement overflow checking."
+ 	<inline: true>
+ 	^true!

Item was changed:
  ----- Method: CogObjectRepresentation>>genPrimitiveMultiply (in category 'primitive generators') -----
  	| jumpNotSI jumpOvfl |
  	<var: #jumpNotSI type: #'AbstractInstruction *'>
  	<var: #jumpOvfl type: #'AbstractInstruction *'>
  	(cogit processorHasMultiplyAndMClassIsSmallInteger) ifFalse:
  	cogit genLoadArgAtDepth: 0 into: Arg0Reg.
  	cogit MoveR: Arg0Reg R: ClassReg.
  	cogit MoveR: ReceiverResultReg R: Arg1Reg.
  	jumpNotSI := self genJumpNotSmallInteger: Arg0Reg scratchReg: TempReg.
  	self genShiftAwaySmallIntegerTagsInScratchReg: ClassReg.
  	self genRemoveSmallIntegerTagsInScratchReg: Arg1Reg.
+ 	cogit MulOverflowR: Arg1Reg R: ClassReg.
- 	cogit MulR: Arg1Reg R: ClassReg.
  	jumpOvfl := cogit JumpOverflow: 0.
  	self genSetSmallIntegerTagsIn: ClassReg.
  	cogit MoveR: ClassReg R: ReceiverResultReg.
  	cogit genPrimReturn.
  	jumpOvfl jmpTarget: (jumpNotSI jmpTarget: cogit Label).

Item was added:
+ ----- Method: Cogit>>MulOverflowR:R: (in category 'abstract instructions') -----
+ MulOverflowR: reg1 R: reg2
+ 	"Multiplication is a little weird on some processors.  Defer to the backEnd
+ 	 to allow it to generate any special code it may need to."
+ 	<inline: true>
+ 	^backEnd canMulRRDetectOverflow
+ 		ifTrue: [backEnd genMulR: reg1 R: reg2]
+ 		ifFalse: [backEnd MulOverflowR: reg1 R: reg2]!

Item was changed:
  ----- Method: Cogit>>provideContextForCurrentInstruction (in category 'simulation processor access') -----
+ 	printRegisters ifTrue:
- 	printRegisters ifFalse:
  		[processor printRegistersOn: coInterpreter transcript].
+ 	(printInstructions
+ 	 and: [self addressIsInCodeZone: processor pc]) ifTrue:
+ 		[self disassembleFrom: processor pc to: processor pc]!
- 	printInstructions ifFalse:
- 		[(self addressIsInCodeZone: processor pc) ifTrue:
- 			[self disassembleFrom: processor pc to: processor pc]]!

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