[Vm-dev] [squeak-dev] Squeak5.3 linux ARMv6 segfaults on startup

tim Rowledge tim at rowledge.org
Tue Mar 17 01:02:11 UTC 2020


Oops. forward here where it belongs.

> Begin forwarded message:
> 
> From: tim Rowledge <tim at rowledge.org>
> Subject: Re: [squeak-dev] [Vm-dev] Squeak5.3 linux ARMv6 segfaults on startup
> Date: March 16, 2020 at 4:42:43 PM PDT
> To: The general-purpose Squeak developers list <squeak-dev at lists.squeakfoundation.org>
> 
> It looks like sometihng caused the CogARMCompiler>>#rotateable8bitImmediate:ifTrue:ifFalse: to get translated in a way that messes up the block args for the falseBlock (which are supposed to be the requird rotation and immediate values.
> 
> What we get is
> 		/* begin rotateable8bitImmediate:ifTrue:ifFalse: */
> 		if ((offset27 & 0xFF) == offset27) {
> 			/* begin machineCodeAt:put: */
> 			aWord42 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg9, immediate5, rot5);
> 			((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord42;
> 			return 4;
> 		}
> 		for (i5 = 2; i5 <= 30; i5 += 2) {
> 			if ((offset27 & (((0xFFU << i5) & 0xFFFFFFFFU) | (((usqInt)(0xFF)) >> (32 - i5)))) == offset27) {
> 				/* begin machineCodeAt:put: */
> 				aWord42 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg9, immediate5, rot5);
> 				((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord42;
> 				return 4;
> 			}
> 		}
> ... when we should get more like -
> 
> 		/* begin rotateable8bitImmediate:ifTrue:ifFalse: */
> 		if ((offset27 & 0xFF) == offset27) {
> 			/* begin machineCodeAt:put: */
> 			aWord37 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg7, offset27, 0U << 1);
> 			((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord37;
> 			(self_in_dispatchConcretize->machineCodeSize) = 4;
> 			goto l204;
> 		}
> 		for (i4 = 2; i4 <= 30; i4 += 2) {
> 			if ((offset27 & (((0xFFU << i4) & 0xFFFFFFFFU) | (((usqInt) 0xFF) >> (32 - i4)))) == offset27) {
>>>>>>>>> 		rot4 = 32 - i4;														<<<<<<<<<<<
>>>>>>>>> 		immediate4 = (((usqInt) offset27) >> i4) | ((offset27 << (32 - i4)) & 0xFFFFFFFFU); <<<<<<<<<<<
> 				/* begin machineCodeAt:put: */
> 				aWord37 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg7, immediate4, ((sqInt)((usqInt)(rot4) << 1)));
> 				((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord37;
> 				(self_in_dispatchConcretize->machineCodeSize) = 4;
> 				goto l204;
> 			}
> 		}
> (ignoring for a moment the desired change in the last couple of lines)
> 
> The actual code for CogARMCompiler>>#rotateable8bitImmediate:ifTrue:ifFalse: hasn't changed since 2015 so it's some other part of the system at fault. Do I recall correctly that some changes were recently made in the translator stuff for type-fiddling?
> 
> tim
> --
> tim Rowledge; tim at rowledge.org; http://www.rowledge.org/tim
> Don't diddle code to make it faster; find a better algorithm.
> 
> 
> Begin forwarded message:
> 
> From: tim Rowledge <tim at rowledge.org>
> Subject: Re: [squeak-dev] [Vm-dev] Squeak5.3 linux ARMv6 segfaults on startup
> Date: March 16, 2020 at 4:42:43 PM PDT
> To: The general-purpose Squeak developers list <squeak-dev at lists.squeakfoundation.org>
> Reply-To: The general-purpose Squeak developers list <squeak-dev at lists.squeakfoundation.org>
> 
> It looks like sometihng caused the CogARMCompiler>>#rotateable8bitImmediate:ifTrue:ifFalse: to get translated in a way that messes up the block args for the falseBlock (which are supposed to be the requird rotation and immediate values.
> 
> What we get is
> 		/* begin rotateable8bitImmediate:ifTrue:ifFalse: */
> 		if ((offset27 & 0xFF) == offset27) {
> 			/* begin machineCodeAt:put: */
> 			aWord42 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg9, immediate5, rot5);
> 			((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord42;
> 			return 4;
> 		}
> 		for (i5 = 2; i5 <= 30; i5 += 2) {
> 			if ((offset27 & (((0xFFU << i5) & 0xFFFFFFFFU) | (((usqInt)(0xFF)) >> (32 - i5)))) == offset27) {
> 				/* begin machineCodeAt:put: */
> 				aWord42 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg9, immediate5, rot5);
> 				((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord42;
> 				return 4;
> 			}
> 		}
> ... when we should get more like -
> 
> 		/* begin rotateable8bitImmediate:ifTrue:ifFalse: */
> 		if ((offset27 & 0xFF) == offset27) {
> 			/* begin machineCodeAt:put: */
> 			aWord37 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg7, offset27, 0U << 1);
> 			((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord37;
> 			(self_in_dispatchConcretize->machineCodeSize) = 4;
> 			goto l204;
> 		}
> 		for (i4 = 2; i4 <= 30; i4 += 2) {
> 			if ((offset27 & (((0xFFU << i4) & 0xFFFFFFFFU) | (((usqInt) 0xFF) >> (32 - i4)))) == offset27) {
>>>>>>>>> 		rot4 = 32 - i4;														<<<<<<<<<<<
>>>>>>>>> 		immediate4 = (((usqInt) offset27) >> i4) | ((offset27 << (32 - i4)) & 0xFFFFFFFFU); <<<<<<<<<<<
> 				/* begin machineCodeAt:put: */
> 				aWord37 = addrnimmror(self_in_dispatchConcretize, destReg1, srcReg7, immediate4, ((sqInt)((usqInt)(rot4) << 1)));
> 				((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord37;
> 				(self_in_dispatchConcretize->machineCodeSize) = 4;
> 				goto l204;
> 			}
> 		}
> (ignoring for a moment the desired change in the last couple of lines)
> 
> The actual code for CogARMCompiler>>#rotateable8bitImmediate:ifTrue:ifFalse: hasn't changed since 2015 so it's some other part of the system at fault. Do I recall correctly that some changes were recently made in the translator stuff for type-fiddling?
> 
> tim
> --
> tim Rowledge; tim at rowledge.org; http://www.rowledge.org/tim
> Don't diddle code to make it faster; find a better algorithm.
> 
> 
> 
> 


tim
--
tim Rowledge; tim at rowledge.org; http://www.rowledge.org/tim
Any given program will expand to fill available memory.


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